參數(shù)資料
型號: MC74LVX4066DTR2
廠商: ON SEMICONDUCTOR
元件分類: 運動控制電子
英文描述: Quad Analog Switch/Multiplexer/Demultiplexer
中文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO14
封裝: TSSOP-14
文件頁數(shù): 2/12頁
文件大?。?/td> 271K
代理商: MC74LVX4066DTR2
MC74LVX4066
http://onsemi.com
2
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
Positive DC Supply Voltage (Referenced to GND)
Analog Input Voltage (Referenced to GND)
Digital Input Voltage (Referenced to GND)
DC Current Into or Out of ON/OFF Control Pins
DC Current Into or Out of Switch Pins
Power Dissipation in Still Air,
Tstg
Storage Temperature
TL
Lead Temperature, 1 mm from Case for 10 Seconds
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
±
20
±
20
500
450
mA
mA
mW
V
V
V
SOIC Package
TSSOP Package
– 65 to + 150
C
260
C
*For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may
be drawn; i.e., the current out of the switch may contain both VCC and switch input
components. The reliability of the device will be unaffected unless the Maximum Ratings are
exceeded.
Symbol
Parameter
Min
Max
Unit
Inputs (Figure 10)
Input Rise and Fall Time, ON/OFF Control
VCC = 3.3 V
±
0.3 V
VCC = 5.0 V
±
0.5 V
0
0
100
20
Guaranteed Limit
– 55 to
25 C
Symbol
Parameter
Test Conditions
V
3.85
2.1
3.15
3.85
125 C
2.1
Current (per Package)
ON/OFF Control Inputs
3.0
2.1
Vin = VCC or GND
Maximum Low–Level Voltage
2.0
5.5
0.5
1.65
0.5
1.35
1.65
0.5
1.65
V
Iin
Maximum Input Leakage Current
5.5V
±
0.1
±
1.0
±
1.0
μ
A
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
(Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
VCC.
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