參數(shù)資料
型號(hào): MC74LCX573DWR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
中文描述: LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: SOIC-20
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 103K
代理商: MC74LCX573DWR2
MC74LCX573
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS
T
A
= 40
°
C to +85
°
C
Min
Symbol
Characteristic
Condition
Max
Unit
V
IH
HIGH Level Input Voltage (Note 2)
2.3 V
V
CC
2.7 V
2.7 V
V
CC
3.6 V
2.3 V
V
CC
2.7 V
2.7 V
V
CC
3.6 V
2.3 V
V
CC
3.6 V; I
OL
= 100 A
V
CC
= 2.3 V; I
OH
= 8 mA
V
CC
= 2.7 V; I
OH
= 12 mA
V
CC
= 3.0 V; I
OH
= 18 mA
V
CC
= 3.0 V; I
OH
= 24 mA
2.3 V
V
CC
3.6 V; I
OL
= 100 A
V
CC
= 2.3 V; I
OL
= 8 mA
V
CC
= 2.7 V; I
OL
= 12 mA
V
CC
= 3.0 V; I
OL
= 16 mA
V
CC
= 3.0 V; I
OL
= 24 mA
2.3 V
V
CC
3.6 V; 0 V
V
I
5.5 V
2.3
V
CC
3.6 V; 0V
V
O
5.5 V;
V
I
= V
IH
or V
IL
1.7
V
2.0
V
IL
LOW Level Input Voltage (Note 2)
0.7
V
0.8
V
OH
HIGH Level Output Voltage
V
CC
0.2
1.8
V
2.2
2.4
2.2
V
OL
LOW Level Output Voltage
0.2
V
0.6
0.4
0.4
0.55
I
I
I
OZ
Input Leakage Current
±
5
±
5
A
3State Output Current
A
I
OFF
I
CC
PowerOff Leakage Current
V
CC
= 0 V; V
I
or V
O
= 5.5 V
2.3
V
CC
3.6 V; V
I
= GND or V
CC
2.3
V
CC
3.6 V; 3.6
V
I
or V
O
5.5 V
2.3
V
CC
3.6 V; V
IH
= V
CC
0.6 V
10
A
Quiescent Supply Current
10
A
±
10
I
CC
Increase in I
CC
per Input
500
A
2. These values of V
I
are used to test DC electrical characteristics only.
AC CHARACTERISTICS
t
R
= t
F
= 2.5 ns; R
L
= 500
Limits
T
A
= 40
°
C to +85
°
C
V
CC
= 3.3 V
±
0.3 V
V
CC
= 2.7 V
C
L
= 50 pF
V
CC
= 2.5 V
±
0.2 V
C
L
= 30 pF
C
L
= 50 pF
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
s
Parameter
Waveform
1
Min
Max
Min
Max
Min
Max
Unit
ns
Propagation Delay
D
n
to O
n
Propagation Delay
LE to O
n
Output Enable Time to HIGH
and LOW Level
1.5
1.5
8.0
8.0
1.5
1.5
9.0
9.0
1.5
1.5
9.6
9.6
3
1.5
1.5
8.5
8.5
1.5
1.5
9.5
9.5
1.5
1.5
10.5
10.5
ns
2
1.5
1.5
8.5
8.5
1.5
1.5
9.5
9.5
1.5
1.5
10.5
10.5
ns
Output Disable Time From
High and Low Level
2
1.5
1.5
6.5
6.5
1.5
1.5
7.0
7.0
1.5
1.5
7.8
7.8
ns
Setup TIme, HIGH or LOW
D
n
to LE
Hold TIme, HIGH or LOW
D
n
to LE
LE Pulse Width, HIGH
3
2.5
2.5
4.0
t
h
3
1.5
1.5
2.0
t
w
t
OSHL
t
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGHtoLOW (t
OSHL
) or LOWtoHIGH (t
OSLH
); parameter
guaranteed by design.
3
3.3
3.3
4.0
OutputtoOutput Skew
(Note 3)
1.0
1.0
ns
相關(guān)PDF資料
PDF描述
MC74LCX573DWR2G Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
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MC74LCX574DWR2 Low-Voltage CMOS Octal D-Type Flip-Flop Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
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