參數(shù)資料
型號(hào)： MC74HCT573ADT
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs
中文描述： HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝： PLASTIC, TSSOP-20
文件頁數(shù)： 1/6頁
文件大?。?/td> 202K
代理商： MC74HCT573ADT
SEMICONDUCTOR TECHNICAL DATA
1
REV 7
Motorola, Inc. 1996
10/96
"
#
!
High–Performance Silicon–Gate CMOS
The MC74HCT573A is identical in pinout to the LS573. This device may
be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes low,
data meeting the setup and hold times becomes latched.
The Output Enable input does not affect the state of the latches, but when
Output Enable is high, all device outputs are forced to the high–impedance
state. Thus, data may be latched even when the outputs are not enabled.
The HCT573A is identical in function to the HCT373A but has the Data
Inputs on the opposite side of the package from the outputs to facilitate PC
board layout.
The HCT573A is the noninverting version of the HC563A.
Output Drive Capability: 15 LSTTL Loads
TTL/NMOS–Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 10
μ
A
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 234 FETs or 58.5 Equivalent Gates
— Improved Propagation Delays
— 50% Lower Quiescent Power
LOGIC DIAGRAM
DATA
INPUTS
D0
D1
D2
D3
D4
D5
D6
D7
LATCH ENABLE
OUTPUT ENABLE
11
1
9
8
7
6
5
4
3
2
19
18
17
16
15
14
13
12
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
PIN 20 = VCC
PIN 10 = GND
NONINVERTING
OUTPUTS
* Equivalent to a two–input NAND gate.
μ
W
Internal Gate Propagation Delay
1.5
ns
Speed Power Product
0.0075
Internal Gate Power Dissipation
5.0
pJ
PIN ASSIGNMENT
D4
D2
D1
D0
OUTPUT
ENABLE
GND
D7
D6
D5
D3
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Q3
Q2
Q1
Q0
VCC
LATCH
ENABLE
Q7
Q6
Q5
Q4
FUNCTION TABLE
Inputs
Latch
Enable
Output
Output
Enable
D
Q
L
L
L
H
H
H
L
X
H
L
X
X
H
L
No Change
Z
X = Don’t Care
Z = High Impedance
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
ORDERING INFORMATION
MC74HCTXXXAN
MC74HCTXXXADW
MC74HCTXXXADT
Plastic
SOIC
TSSOP
1
20
1
20
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
1
20
相關(guān)PDF資料
PDF描述
MC74HCT573ADW Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs
MC74HCT573AN Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs
MC74HCT574ADW Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs
MC74HCT574 Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs
MC74HCT574A Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC74HCT573ADTR2 功能描述:閉鎖 5V Octal 3-State RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
MC74HCT573ADTR2G 功能描述:閉鎖 5V Octal 3-State Inverter RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
MC74HCT573ADW 功能描述:閉鎖 5V Octal 3-State RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
MC74HCT573ADWG 功能描述:閉鎖 5V Octal 3-State Inverter RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
MC74HCT573ADWR 制造商:Rochester Electronics LLC 功能描述:- Bulk
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