參數(shù)資料
型號： MC74HCT541AFG
廠商： ON SEMICONDUCTOR
元件分類： 通用總線功能
英文描述： Octal 3−State Non−Inverting Buffer/Line Driver/ Line Receiver With LSTTL−Compatible Inputs
中文描述： HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝： LEAD FREE, EIAJ, SOP-20
文件頁數(shù)： 3/8頁
文件大小： 118K
代理商： MC74HCT541AFG
MC74HCT541A
http://onsemi.com
3
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
V
Guaranteed Limit
Symbol
Parameter
Condition
55 to 25
°
C
2.0
2.0
≤
85
°
C
2.0
2.0
≤
125
°
C
2.0
2.0
Unit
V
IH
Minimum HighLevel Input Voltage
V
out
= 0.1V or V
CC
0.1V
|I
out
|
≤
20 A
4.5
5.5
V
V
IL
Maximum LowLevel Input Voltage
V
out
= 0.1V or V
CC
0.1V
|I
out
|
≤
20 A
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
V
V
OH
Minimum HighLevel Output Voltage
V
in
= V
IH
or V
IL
|I
out
|
≤
20 A
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
V
V
in
= V
IH
or V
IL
|I
out
|
≤
6.0mA
4.5
3.98
3.84
3.70
V
OL
Maximum LowLevel Output Voltage
V
in
= V
IH
or V
IL
|I
out
|
≤
20 A
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IH
or V
IL
|I
out
|
≤
6.0mA
4.5
0.26
0.33
0.40
I
in
Maximum Input Leakage Current
V
in
= V
CC
or GND
5.5
±
0.1
±
1.0
±
1.0
A
I
OZ
Maximum 3State Leakage Current
Output in High Impedance State
V
in
= V
IL
or V
IH
V
out
= V
CC
or GND
5.5
±
0.5
±
5.0
±
10.0
A
I
CC
Maximum Quiescent Supply Current
(per Package)
V
in
= V
CC
or GND
I
out
= 0 A
5.5
4
40
160
A
I
CC
Additional Quiescent Supply Current
V
in
= 2.4V, Any One Input
V
in
= V
CC
or GND, Other Inputs
I
out
= 0 A
5.5
≥
55
°
C
25 to 125
°
C
mA
2.9
2.4
1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
2. Total Supply Current = I
CC
+
Σ
I
CC
.
AC CHARACTERISTICS
(V
CC
= 5.0V, C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Guaranteed Limit
Symbol
Parameter
55 to 25
°
C
≤
85
°
C
≤
125
°
C
Unit
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
23
28
32
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
30
34
38
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
30
34
38
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
12
15
18
ns
C
in
Maximum Input Capacitance
10
10
10
pF
C
out
Maximum 3State Output Capacitance (Output in High Impedance State)
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor HighSpeed CMOS Data Book (DL129/D).
15
15
15
pF
C
PD
Power Dissipation Capacitance (Per Buffer)*
* Used to determine the noload dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
Typical @ 25
°
C, V
CC
= 5.0 V
pF
55
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