參數(shù)資料
型號: MC74HCT174A
廠商: Motorola, Inc.
英文描述: Hex D Flip-Flop with Common Clock and Reset with LSTTL Compatible Inputs
中文描述: 六角D觸發(fā)器與普通時鐘和復(fù)位觸發(fā)器與輸入通道兼容輸入
文件頁數(shù): 1/5頁
文件大?。?/td> 178K
代理商: MC74HCT174A
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
# "
" !
High–Performance Silicon–Gate CMOS
The MC74HCT174A is identical in pinout to the LS174. This device may
be used as a level converter for interfacing TTL or NMOS outputs to High
Speed CMOS inputs.
This device consists of six D flip–flops with common Clock and Reset
inputs. Each flip–flop is loaded with a low–to–high transition of the Clock
input. Reset is asynchronous and active–low.
Output Drive Capability: 10 LSTTL Loads
TTL NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 178 FETs or 44.5 Equivalent Gates
LOGIC DIAGRAM
PIN 16 = VCC
PIN 8 = GND
3
4
6
11
13
14
2
5
7
10
12
15
D0
D1
D2
D3
D4
D5
Q0
Q1
Q2
Q3
Q4
Q5
CLOCK
9
RESET
1
DATA
INPUTS
NONINVERTING
OUTPUTS
Design Criteria
Value
Units
Speed Power Product
0.0075
* Equivalent to a two–input NAND gate.
pJ
PIN ASSIGNMENT
FUNCTION TABLE
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q4
D4
D5
Q5
VCC
CLOCK
Q3
D3
D1
D0
Q0
RESET
GND
Q2
D2
Q1
Inputs
Clock
Output
Q
Reset
D
L
H
H
H
H
X
X
H
L
X
X
L
H
L
L
No Change
No Change
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
1
16
ORDERING INFORMATION
MC74HCXXXAN
MC74HCXXXAD
Plastic
SOIC
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