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參數(shù)資料
| 型號(hào)： | MC74HC595ADTR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs |
| 中文描述： | HC/UH SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | LEAD FREE, TSSOP-16 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 224K |
| 代理商： | MC74HC595ADTR2 |
MC54/74HC595A
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
FUNCTION TABLE
Operation
Inputs
Resulting Function
Latch
Register
Contents
Reset
L
Serial
Input
A
Shift
Clock
Latch
Clock
L, H,
↓
L, H,
↓
Output
Enable
Shift
Register
Contents
Serial
Output
SQH
L
Parallel
Outputs
QA – QH
U
Reset shift register
X
X
L
L
U
Shift data into shift
register
H
D
↑
L
D
→
SRA;
SRN
→
SRN+1
U
U
SRG
→
SRH
U
Shift register remains
unchanged
H
X
L, H,
↓
L, H,
↓
L
U
U
U
Transfer shift register
contents to latch register
H
X
L, H,
↓
↑
L
U
SRN
→
LRN
U
SRN
Latch register remains
unchanged
X
X
X
L, H,
↓
L
*
U
*
U
Enable parallel outputs
X
X
X
X
L
*
**
*
Enabled
Force outputs into high
impedance state
X
X
X
X
H
*
**
*
Z
SR = shift register contents
LR = latch register contents
D = data (L, H) logic level
U = remains unchanged
↑
= Low–to–High
↓
= High–to–Low
* = depends on Reset and Shift Clock inputs
** = depends on Latch Clock input
PIN DESCRIPTIONS
INPUTS
A (Pin 14)
Serial Data Input. The data on this pin is shifted into the
8–bit serial shift register.
CONTROL INPUTS
Shift Clock (Pin 11)
Shift Register Clock Input. A low– to–high transition on this
input causes the data at the Serial Input pin to be shifted into
the 8–bit shift register.
Reset (Pin 10)
Active–low, Asynchronous, Shift Register Reset Input. A
low on this pin resets the shift register portion of this device
only. The 8–bit latch is not affected.
Latch Clock (Pin 12)
Storage Latch Clock Input. A low–to–high transition on this
input latches the shift register data.
Output Enable (Pin 13)
Active–low Output Enable. A low on this input allows the
data from the latches to be presented at the outputs. A high
on this input forces the outputs (QA–QH) into the high–
impedance state. The serial output is not affected by this
control unit.
OUTPUTS
QA – QH (Pins 15, 1, 2, 3, 4, 5, 6, 7)
Noninverted, 3–state, latch outputs.
SQH (Pin 9)
Noninverted, Serial Data Output. This is the output of the
eighth stage of the 8–bit shift register. This output does not
have three–state capability.
相關(guān)PDF資料 |
PDF描述 |
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| MC74HC595AN | 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs |
| MC74HC595ADT | 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with 3-State Outputs |
| MC74HC595AN | 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with 3-State Outputs |
| MC74HC597AD | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
| MC74HC597 | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74HC595ADTR2G | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit 3 State Shift RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC74HC595ADTR2G | 制造商:ON Semiconductor 功能描述:REGISTER LOGIC IC |
| MC74HC595ADTR2G-CUT TAPE | 制造商:ON 功能描述:MC74HC595A Series 2 to 6 V Shift Register w/ 3 State Outputs - TSSOP-16 |
| MC74HC595AF | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC595AFEL | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit 3 State Shift RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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