參數(shù)資料
型號(hào): MC74HC534AN
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Octal 3-State Inverting D Flip-Flop
中文描述: HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 1/7頁
文件大?。?/td> 161K
代理商: MC74HC534AN
SEMICONDUCTOR TECHNICAL DATA
3–1
REV 7
Motorola, Inc. 1997
3/97
High–Performance Silicon–Gate CMOS
The MC54/74HC534A is identical in pinout to the LS534. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Data meeting the setup time is clocked, in inverted form, to the outputs
with the rising edge of the Clock. The Output Enable input does not affect the
states of the flip–flops, but when Output Enable is high, the outputs are
forced to the high impedance state. Thus, data may be stored even when the
outputs are not enabled.
The HC534A is identical in function to the HC564 which has the data
inputs on the opposite side of the package from the outputs to facilitate PC
board layout.
This device is similar in function to the HC374A, which has noninverting
outputs.
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 282 FETs or 68.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0
11
CLOCK
D1
D2
D3
D4
D5
D6
D7
18
17
14
13
8
7
4
3
1
OUTPUT ENABLE
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
16
15
12
9
6
5
2
PIN 20 = VCC
PIN 10 = GND
INVERTING
OUTPUTS
PIN ASSIGNMENT
Q2
D1
D0
Q0
OUTPUT
ENABLE
GND
Q3
D3
D2
Q1
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Q6
D6
D7
Q7
VCC
CLOCK
Q4
D4
D5
Q5
FUNCTION TABLE
Inputs
Output
Output
Enable
Clock
D
Q
L
L
L
H
H
L
X
X
L
H
L,H,
No Change
Z
X
X = Don’t Care
Z = High Impedance
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXADW
Ceramic
Plastic
SOIC
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
1
20
1
20
1
20
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