參數(shù)資料
型號: MC74HC4075N
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Triple 3-Input OR Gate
中文描述: HC/UH SERIES, TRIPLE 3-INPUT OR GATE, PDIP14
封裝: PLASTIC, DIP-14
文件頁數(shù): 3/4頁
文件大小: 137K
代理商: MC74HC4075N
MC74HC4075
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
tPHL
(Figures 1 and 2)
4.5
23
35
6.0
13
29
19
Cin
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Maximum Input Capacitance
10
16
10
pF
10
CPD
Power Dissipation Capacitance (Per Gate)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
26
pF
tr
tf
VCC
GND
90%
50%
10%
INPUT
A, B OR C
OUTPUT Y
tPLH
tPHL
tTLH
tTHL
A
B
C
Y
Figure 1. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/3 of the Device)
90%
50%
10%
* Includes all probe and jig capacitance
Figure 2. Test Circuit
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
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