參數(shù)資料
型號(hào): MC74HC4024N
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: 7-Stage Binary Ripple Counter
中文描述: HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, PDIP14
封裝: PLASTIC, DIP-14
文件頁(yè)數(shù): 4/6頁(yè)
文件大小: 173K
代理商: MC74HC4024N
MC74HC4024
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
4
PIN DESCRIPTIONS
INPUTS
Clock (Pin 1)
Negative edge triggering clock input. A High to low transi-
tion of this input advances the state of the counter.
Reset (Pin 2)
Active high asynchronous reset. A high level applied to this
input resets the counter to its zero state, thus forcing all Q
outputs low.
OUTPUTS
Q1–Q7 (Pins 12, 11, 9, 6, 5, 4, 3)
Active–high outputs. Each QN output divides the Clock in-
put frequency by 2N.
SWITCHING WAVEFORMS
RESET
Q
CLOCK
VCC
GND
VCC
GND
50%
50%
50%
tPHL
trec
Figure 1.
Figure 2.
Figure 3.
CLOCK
Q1
90%
50%
10%
VCC
GND
tf
tr
tPLH
tPHL
tTLH
tTHL
QN
QN + 1
90%
50%
10%
VCC
GND
50%
50%
tPLH
tPHL
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
tw
1/fmax
tw
Figure 4. Test Circuit
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