
Semiconductor Components Industries, LLC, 2012
June, 2012 Rev. 3
1
Publication Order Number:
MC74HC259A/D
MC74HC259A
8-Bit Addressable Latch
1-of-8 Decoder
HighPerformance SiliconGate CMOS
The MC74HC259A is identical in pinout to the LS259. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The HC259A has four modes of operation as shown in the mode
selection table. In the addressable latch mode, the data on Data In is
written into the addressed latch. The addressed latch follows the data
input with all nonaddressed latches remaining in their previous
states. In the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs. In the oneofeight
decoding or demultiplexing mode, the addressed output follows the
state of Data In with all other outputs in the LOW state. In the Reset
mode all outputs are LOW and unaffected by the address and data
inputs. When operating the HC259A as an addressable latch, changing
more than one bit of the address could impose a transient wrong
address. Therefore, this should only be done while in the memory
mode.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
1
16
HC259AG
AWLYWW
HC
259A
ALYWG
G
1
16
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page
6 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
PIN ASSIGNMENT
1
16
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q7
DATA IN
ENABLE
RESET
VCC
Q4
Q5
Q6
Q0
A2
A1
A0
GND
Q3
Q2
Q1
MODE SELECTION TABLE
Enable
Reset
Mode
L
H
Addressable Latch
H
Memory
LL
8Line Demultiplexer
H
L
Reset