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參數(shù)資料
| 型號(hào)： | MC74HC162AD |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable Counters |
| 中文描述： | HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 323K |
| 代理商： | MC74HC162AD |
MC54/74HC160A MC54/74HC162A
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
Symbol
b l
Parameter
25 C
U i
6.0
26
– 55 to
TBD
TBD
23
125 C
38
6.0
(Figure 5)
3.0
27
35
TBD
33
TBD
6.0
6.0
4.5
6.0
(Figure 5)
3.0
34
200
TBD
41
51
3
3
3
TBD
29
TBD
Minimum Setup Time, Reset to Clock (HC162A only)
(Figure 4)
2.0
3.0
9
160
TBD
200
TBD
34
240
TBD
ns
Minimum Setup Time, Enable T or Enable P to Clock
(Figure 6)
2.0
3.0
3
250
TBD
43
300
TBD
ns
Minimum Hold Time, Clock to Preset Data Inputs
2.0
6.0
50
125
25
38
65
11
75
13
ns
th
Minimum Hold Time, Clock to Load
4.5
6.0
2.0
6.0
3
3
3
3
3
3
ns
th
Minimum Hold Time, Clock to Reset (HC162A only)
2.0
3
3
25
3
3
3
3
3
ns
th
4.5
Minimum Hold Time, Clock to Enable T or Enable P
2.0
3
3
3
3
3
3
3
trec
4.5
Minimum Recovery Time, Reset Inactive to Clock (HC160A only)
2.0
16
14
38
155
31
190
6.0
Minimum Recovery Time, Load Inactive to Clock
(Figure 5)
16
31
Minimum Pulse Width, Clock
(Figure 1)
4.5
500
1000
20
24
Minimum Pulse Width, Reset (HC160A only)
(Figure 2)
4.5
20
24
Maximum Input Rise and Fall Times
(Figure 1)
4.5
500
500
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