參數(shù)資料
型號: MC74HC137D
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: 1-of-8 Decoder/Demultiplexer with Address Latch
中文描述: HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
封裝: 0.150 INCH, PLASTIC, SOIC-16
文件頁數(shù): 3/6頁
文件大?。?/td> 210K
代理商: MC74HC137D
MC74HC137
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
(Figures 1 and 6)
4.5
34
51
6.o
41
43
61
tPLH
Maximum Propagation Delay, CS1 or CS2 to Output Y
2.0
150
190
51
225
ns
4.5
39
59
6.0
30
49
45
tPHL
2.0
6.0
250
43
315
37
375
64
tTHL
Maximum Output Transition Time, Any Output
(Figures 2 and 6)
2.0
4.5
75
15
54
110
22
ns
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
95
19
CPD
Power Dissipation Capacitance (Per Package)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
100
pF
Symbol
Parameter
V
VCC
– 55 to
25 C
125 C
tsu
Minimum Setup Time, Input A to Latch Enable
2.0
6.0
100
17
85 C
125
150
26
Unit
ns
Minimum Hold Time, Latch Enable to Input A
(Figure 5)
2.0
4.5
50
10
21
75
15
ns
(Figure 4)
4.5
6.0
16
14
65
13
24
20
tr, tf
Maximum Input Rise and Fall Times
2.0
6.0
1000
400
1000
400
20
17
1000
400
ns
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
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