參數(shù)資料
型號: MC74ACT299DTR2
廠商: ON SEMICONDUCTOR
元件分類: 計數(shù)移位寄存器
英文描述: ACT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO20
封裝: TSSOP-20
文件頁數(shù): 3/9頁
文件大?。?/td> 532K
代理商: MC74ACT299DTR2
MC74AC299, MC74ACT299
http://onsemi.com
224
FUNCTIONAL DESCRIPTION
The MC74AC299/74ACT299 contains eight edge–triggered
D–type flip–flops and the interstage logic necessary to
perform synchronous shift left, shift right, parallel load and
hold operations. The type of operation is determined by S0
and S1, as shown in the Truth Table. All flip–flop outputs are
brought out through 3–state buffers to separate I/O pins that
also serve as data inputs in the parallel load mode. Q0 and Q7
are also brought out on other pins for expansion in serial
shifting of longer words.
A LOW signal on MR overrides the Select and CP inputs
and resets the flip–flops. All other state changes are initiated
by the rising edge of the clock. Inputs can change when the
clock is in either state provided only that the recommended
setup and hold times, relative to the rising edge of CP, are
observed.
A HIGH signal on either OE1 or OE2 disables the 3-state
buffers and puts the I/O pins in the high impedance state. In
this condition the shift, hold, load and reset operations can
still occur. The 3–state buffers are also disabled by HIGH
signals on both S0 and S1 in preparation for a parallel load
operation.
TRUTH TABLE
Inputs
Response
MR
S1
S0
CP
Response
L
X
Asynchronous Reset; Q0–Q7 = LOW
H
Parallel Load; I/On → Qn
H
L
H
Shift Rights; DS0 → Q0, Q0 → Q1, etc.
H
L
Shift Left; DS7 → Q7, Q7 → Q6, etc.
H
L
X
Hold
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
–65 to +150
°C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
V
S ppl Voltage
′AC
2.0
5.0
6.0
V
VCC
Supply Voltage
′ACT
4.5
5.0
5.5
V
VIN, VOUT
DC Input Voltage, Output Voltage (Ref. to GND)
0
VCC
V
VCC @ 3.0 V
150
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
VCC @ 4.5 V
40
ns/V
r, f
′AC Devices except Schmitt Inputs
VCC @ 5.5 V
25
ttf
Input Rise and Fall Time (Note 2)
VCC @ 4.5 V
10
ns/V
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
VCC @ 5.5 V
8.0
ns/V
TJ
Junction Temperature (PDIP)
140
°C
TA
Operating Ambient Temperature Range
–40
25
85
°C
IOH
Output Current – High
–24
mA
IOL
Output Current – Low
24
mA
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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