參數(shù)資料
型號: MC74ACT174DR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Hex D Flip−Flop with Master Reset
中文描述: ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 2/9頁
文件大?。?/td> 234K
代理商: MC74ACT174DR2
MC74AC174, MC74ACT174
http://onsemi.com
2
Figure 2. Logic Symbol
CP
MR
Q
2
Q
3
Q
4
Q
5
D
0
D
1
D
2
D
3
D
4
D
5
Q
1
Q
0
FUNCTIONAL DESCRIPTION
The
MC74AC174/74ACT174
edge
triggered D flip
flops with individual D inputs and Q
outputs. The Clock (CP) and Master Reset (MR) are
common to all flip
flops. Each D input’s state is transferred
to the corresponding flip
flop’s output following the
consists
of
six
LOW
to
HIGH Clock (CP) transition. A LOW input to the
Master Reset (MR) will force all outputs LOW independent
of Clock or Data inputs. The MC74AC174/ 74ACT174 is
useful for applications where the true output only is required
and the Clock and Master Reset are common to all storage
elements.
Figure 3. Logic Diagram
CP
MR
Q
5
D
5
Q
CD
NOTE:
This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
CP
D
Q
4
D
4
Q
CD
CP
D
Q
3
D
3
Q
CD
CP
D
Q
2
D
2
Q
CD
CP
D
Q
1
D
1
Q
CD
CP
D
Q
0
D
0
Q
CD
CP
D
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
V
IN
DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
0.5 to V
CC
V
I
IN
DC Input Current, per Pin
±
20
mA
I
OUT
DC Output Sink/Source Current, per Pin
±
50
mA
I
CC
DC V
CC
or GND Current per Output Pin
±
50
mA
T
stg
Storage Temperature
65 to +150
°
C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC74ACT174DT 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Hex D Flip−Flop with Master Reset
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