參數(shù)資料
型號: MC74AC253MEL
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual 4−Input Multiplexer with 3−State Outputs
中文描述: AC SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封裝: PLASTIC, EIAJ-16
文件頁數(shù): 2/11頁
文件大小: 191K
代理商: MC74AC253MEL
MC74AC253, MC74ACT253
http://onsemi.com
2
TRUTH TABLE
Select
Inputs
Data Inputs
Output
Enable
Outputs
S
0
S
1
I
0
I
1
I
2
I
3
OE
Z
X
L
L
H
H
L
L
H
H
X
L
L
L
L
H
H
H
H
X
L
H
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
L
H
H
L
L
L
L
L
L
L
L
Z
L
H
L
H
L
H
L
H
Address inputs S
0
and S
1
are common to both sections.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
FUNCTIONAL DESCRIPTION
The MC74AC253/74ACT253 contains two identical
4
input multiplexers with 3
state outputs. They select two
bits from four sources selected by common Select inputs (S
0
,
S
1
). The 4
input multiplexers have individual Output
Enable (OE
a
, OE
b
) inputs which, when HIGH, force the
outputs to a high impedance (High Z) state. This device is the
logic implementation of a 2
pole, 4
position switch, where
the position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for the
outputs are shown:
Z
a
= OE
a
(I
0a
S
1
S
0
+I
1a
S
1
S
0
+
I
2a
S
1
S
0
+I
3a
S
1
S
0
)
Z
b
= OE
b
(I
0b
S
1
S
0
+I
1b
S
1
S
0
+
I
2b
S
1
S
0
+I
3b
S
1
S
0
)
If the outputs of 3
state devices are tied together, all but
one device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings. Designers
should ensure that Output Enable signals to 3
state devices
whose outputs are tied together are designed so that there is
no overlap.
OE
b
I
3b
I
2b
I
1b
I
0b
S
0
S
1
I
3a
I
2a
Z
b
Z
a
I
1a
I
0a
OE
a
NOTE:
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
Figure 2. Logic Symbol
S
0
S
1
OE
a
I
0a
I
1a
I
2a
I
3a
Z
a
Z
b
I
0b
I
1b
I
2b
I
3b
OE
b
相關(guān)PDF資料
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