參數(shù)資料
型號(hào)： MC74AC161DWR2
廠商： ON SEMICONDUCTOR
元件分類： 計(jì)數(shù)器
英文描述： AC SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
封裝： PLASTIC, SOIC-16
文件頁(yè)數(shù)： 3/16頁(yè)
文件大?。?/td> 121K
代理商： MC74AC161DWR2
MC74AC161, MC74ACT161, MC74AC163, MC74ACT163
http://onsemi.com
11
AC OPERATING REQUIREMENTS
74ACT163
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85
°C
CL = 50 pF
Unit
Fig.
No.
Typ
Guaranteed Minimum
ts
Setup Time, HIGH or LOW
50
40
10 0
12 0
ns
3–9
ts
Setu Time, HIGH or LOW
Pn to CP
5.0
4.0
10.0
12.0
ns
3–9
th
Hold Time, HIGH or LOW
50
–5 0
05
ns
3–9
th
Hold Time, HIGH or LOW
Pn to CP
5.0
–5.0
0.5
ns
3–9
ts
Setup Time, HIGH or LOW
50
40
10 0
11 5
ns
3–9
ts
Setu Time, HIGH or LOW
SR to CP
5.0
4.0
10.0
11.5
ns
3–9
th
Hold Time, HIGH or LOW
50
–5 5
–0 5
ns
3–9
th
Hold Time, HIGH or LOW
SR to CP
5.0
–5.5
–0.5
ns
3–9
ts
Setup Time, HIGH or LOW
50
40
85
10 5
ns
3–9
ts
Setu Time, HIGH or LOW
PE to CP
5.0
4.0
8.5
10.5
ns
3–9
th
Hold Time, HIGH or LOW
50
–5 5
–0 5
0
ns
3–9
th
Hold Time, HIGH or LOW
PE to CP
5.0
–5.5
–0.5
0
ns
3–9
ts
Setup Time, HIGH or LOW
50
25
55
65
ns
3–9
ts
Setu Time, HIGH or LOW
CEP or CET to CP
5.0
2.5
5.5
6.5
ns
3–9
th
Hold Time, HIGH or LOW
50
–3 0
0
05
ns
3–9
th
Hold Time, HIGH or LOW
CEP or CET to CP
5.0
–3.0
0
0.5
ns
3–9
tw
Clock Pulse Width
50
20
35
ns
3–6
tw
Clock Pulse Width
HIGH or LOW
5.0
2.0
3.5
ns
3–6
tw
Clock Pulse Width (Count)
50
20
35
ns
3–6
tw
Clock Pulse Width (Count)
HIGH or LOW
5.0
2.0
3.5
ns
3–6
*Voltage Range 5.0 V is 5.0 V
±0.5 V.
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
45
pF
VCC = 5.0 V
MARKING DIAGRAMS
x
= 1 or 3
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
AC16x
AWLYWW
MC74AC16xN
AWLYYWW
AC
16x
ALYW
ACT16x
AWLYWW
ACT
16x
ALYW
MC74ACT16xN
AWLYYWW
DIP–16
SO–16
TSSOP–16
EIAJ–16
74AC16x
ALYW
74ACT16x
ALYW
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