參數(shù)資料
型號(hào): MC74AC14MELG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Hex Inverter Schmitt Trigger
中文描述: AC SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封裝: LEAD FREE, EIAJ, SO-14
文件頁數(shù): 1/9頁
文件大小: 153K
代理商: MC74AC14MELG
Semiconductor Components Industries, LLC, 2006
October, 2006
Rev. 7
1
Publication Order Number:
MC74AC14/D
MC74AC14, MC74ACT14
Hex Inverter Schmitt
Trigger
The MC74AC14/74ACT14 contains six logic inverters which
accept standard CMOS Input signals (TTL levels for MC74ACT14)
and provide standard CMOS output levels. They are capable of
transforming slowly changing input signals into sharply defined,
jitter
free output signals. In addition, they have a greater noise margin
then conventional inverters.
The MC74AC14/74ACT14 has hysteresis between the
positive
going and negative
going input thresholds (typically 1.0 V)
which is determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations.
Features
Schmitt Trigger Inputs
Outputs Source/Sink 24 mA
ACT14 Has TTL Compatible Inputs
Pb
Free Packages are Available
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
DC Supply Voltage (Referenced to GND)
V
CC
0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
V
in
0.5 to V
CC
+0.5
V
DC Output Voltage (Referenced to GND)
V
out
0.5 to V
CC
+0.5
V
DC Input Current, per Pin
I
in
±
20
mA
DC Output Sink/Source Current, per Pin
I
out
±
50
mA
DC V
CC
or GND Current per Output Pin
I
CC
±
50
°
C
Storage Temperature
T
stg
65 to +150
mJ
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
SOEIAJ
14
SUFFIX M
CASE 965
http://onsemi.com
1
TSSOP
14
SUFFIX DT
CASE 948G
SOIC
14
SUFFIX D
CASE 751A
1
1
14
14
14
PDIP
14
SUFFIX N
CASE 646
1
14
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
See general marking information in the device marking
section on page 5 of this data sheet.
DEVICE MARKING INFORMATION
13
14
12
11
10
9
8
2
1
3
4
5
6
7
GND
V
CC
(Top View)
Figure 1. Pinout: 14
Lead Packages
Conductors
FUNCTION TABLE
Input
A
Output
O
L
H
H
L
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