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參數(shù)資料
| 型號(hào)： | MC7448VU867ND |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU RISC 32BIT 360-FCCBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC74xx |
| 處理器類型： | 32-位 MPC74xx PowerPC |
| 速度： | 867MHz |
| 電壓： | 1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 360-CBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 360-FCCBGA（25x25） |
| 包裝： | 托盤 |
MPC7448 Hardware Specifications Addendum for the MC7448xxnnnnNx Series, Rev. 6
4
Freescale Semiconductor
General Parameters
4
General Parameters
Core power supply
1.15 V
(1400 MHz devices)
1.1 V
(1267, 1250 MHz devices)
1.05 V
(1267 MHz revision level D devices only, See Table 17.)
1.0 V
(1000, 867, 800, 667, 600 MHz devices)
specifications for 1400 MHz devices.
5.1
DC Electrical Characteristics
Table 4 provides the recommended operating conditions for the MPC7448 part numbers described here.
NOTE
Table 4 describes the nominal operating conditions of the device. For
information on the operation of the device at supported derated core voltage
conditions, see Section 5.3, “Voltage and Frequency Derating.”
Table 4. Recommended Operating Conditions 1
Characteristic
Symbol
Recommended Value
Unit
Notes
600 MHz,
667 MHz,
800 MHz,
867 MHz,
1000 MHz
1250 MHz,
1267 MHz3
Revision Level C
for 1267 only
1267 MHz3
Revision
Level D only
1400 MHz 3, 4
Core supply
voltage
VDD
1.0 V ± 50 mV
1.1 V ± 50 mV
1.05 V ± 50 mV
1.15 V ± 50 mV
V
PLL supply voltage
AVDD
1.0 V ± 50 mV
1.1 V ± 50 mV
1.05 V ± 50 mV
1.15 V ± 50 mV
V
2
Notes:
1. These are the recommended and tested operating conditions. Some speed grades in addition support voltage derating; see
Section 5.3, “Voltage and Frequency Derating.” Proper device operation outside of these conditions and those specified in
Section 5.3, “Voltage and Frequency Derating,” is not guaranteed.
2. This voltage is the input to the filter discussed in Section 9.2.2, “PLL Power Supply Filtering,” in the hardware specifications
and not necessarily the voltage at the AVDD pin, which may be reduced from VDD by the filter.
3.
VDD and AVDD may be reduced in order to reduce power consumption if further maximum core frequency constraints are
observed. See Section 5.3, “Voltage and Frequency Derating,” for specific information.
4.
Effective for 1400 MHz devices with date code of 0613 and later; this includes all devices with the ‘PPC’ product code. VDD
and AVDD were specified at 1.1V ± 50 mV for 1400 MHz devices with date code 0612 and prior. See Section 11, “Part
Numbering and Marking,” for more information.
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