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| 型號： | MC7448THX1267ND |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU RISC 32BIT 360-FCCBGA |
| 標準包裝： | 1 |
| 系列： | MPC74xx |
| 處理器類型： | 32-位 MPC74xx PowerPC |
| 速度： | 1.267GHz |
| 電壓： | 1.05V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 360-BCBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 360-FCCBGA（25x25） |
| 包裝： | 托盤 |
MPC7448 Hardware Specifications Addendum for the MC7448Txxnnnnmx Series, Rev. 2
Freescale Semiconductor
5
General Parameters
5.3
Voltage and Frequency Derating
To reduce power consumption, these devices support voltage and frequency derating in which the core
voltage (VDD) may be reduced if the reduced maximum processor core frequency requirements are
observed. The supported derated core voltage, resulting maximum processor core frequency (fcore), and
power consumption are provided in Table 11. Only those parameters in Table 11 are affected; all other
parameter specifications are unaffected.
Table 8. Clock AC Timing Specifications
At recommended operating conditions. See Table 4.
Characteristic
Symbol
Maximum Processor Core Frequency (MHz)
Unit
Notes
1000N
1267N
1400N
1700L
Min
Max
Min
Max
Min
Max
Min
Max
Processor frequency
DFS mode disabled
fcore
500
1000
500
1267
500
1400
600
1700
MHz
1, 8, 9
Processor frequency
DFS mode enabled
fcore_DFS
250
500
250
633
250
700
300
850
MHz
10
VCO frequency
fVCO
500
1000
500
1267
500
1400
600
1700
MHz
1, 9
Notes:
1. Caution: The SYSCLK frequency and PLL_CFG[0:5] settings must be chosen such that the resulting SYSCLK (bus)
frequency, processor core frequency, and PLL (VCO) frequency do not exceed their respective maximum or minimum
operating frequencies. Refer to the PLL_CFG[0:5] signal description in Section 9.1.1, “PLL Configuration,” in the hardware
specifications for valid PLL_CFG[0:5] settings.
8. This reflects the maximum and minimum core frequencies when the dynamic frequency switching feature (DFS) is disabled.
fcore_DFS provides the maximum and minimum core frequencies in a DFS mode.
9. Caution: These values specify the maximum processor core and VCO frequencies when the device is operated at the
nominal core voltage. If operating the device at the derated core voltage, the processor core and VCO frequencies must be
reduced. See Section 5.3, “Voltage and Frequency Derating,” for more information.
10.This specification supports the Dynamic Frequency Switching (DFS) feature and is applicable only when one of the DFS
modes (divide-by-2 or divide-by-4) is enabled. When DFS is disabled, the core frequency must conform to the maximum and
minimum frequencies stated for fcore.
Table 11. Supported Voltage, Core Frequency, and Power Consumption Derating
Maximum Rated
Core Frequency
(Device Marking)
Supported
Derated Core
Voltage (VDD)
Maximum Derated
Core Frequency
(fcore)
Full-Power Mode Power Consumption
Typical
Thermal
Maximum
1000N
N/A
1267N
1.0 V ± 50 mV
1000 MHz
6.0 W
7.3 W
8.5 W
1400N
1.0 V ± 50 mV
1000 MHz
8.0 W
9.9 W
11.5 W
1700L
N/A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC7448THX1267NX | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Hardware Specifications Addendum for the MC7448T xxnnnnmx Series |
| MC7448THX1400ND | 功能描述:微處理器 - MPU A8 RV2.2.1 1.1V -40/105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC7448THX1400NX | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Hardware Specifications Addendum for the MC7448T xxnnnnmx Series |
| MC7448THX1700LD | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Hardware Specifications Addendum for the MC7448T xxnnnnmx Series |
| MC7448TVU1000ND | 功能描述:微處理器 - MPU A8 RV2.2.1 1.0V -40/105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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