參數(shù)資料
型號: MC68SEC000CAA10
廠商: Freescale Semiconductor
文件頁數(shù): 5/8頁
文件大?。?/td> 0K
描述: IC MPU 32BIT 10MHZ 64-QFP
標(biāo)準(zhǔn)包裝: 84
系列: M680x0
處理器類型: M680x0 32-位
速度: 10MHz
電壓: 3.3V,5V
安裝類型: 表面貼裝
封裝/外殼: 64-QFP
供應(yīng)商設(shè)備封裝: 64-QFP(14x14)
包裝: 托盤
MOTOROLA
MC68SEC000 PRODUCT INFORMATION
5
Interrupt Control
The MC68SEC000 provides seven levels of interrupts. The interrupt priority level (IPL2, IPL1, IPL0) inputs
determine the priority level. Level 7 is nonmaskable and is the highest priority interrupt. Automatic vectoring,
based on IPL inputs, is available with the autovector (AVEC) input.
System Control
The system control inputs include the RESET, HALT, BERR, and MODE signals. These signals can reset
or halt the controller, indicate to the controller that a bus error has occurred, and select from 8- or 16-bit
operating mode.
Processor Status (FC2, FC1, FC0)
These active-high, three-state function code outputs indicate the mode (user or supervisor) and the address
space currently being accessed. The function code outputs are valid whenever AS is active.
PACKAGE DIAGRAM
The following package diagram applies to both the plastic QFP and TQFP packages of the MC68SEC000.
Figure 3. MC68SEC000 Package Diagram
A19
A18
A17
A16
A15
A14
A13
VCC
D13
D14
D15
A20
A21
A23
A22
D5
D6
D7
D4
D3
D2
D1
D0
AS
R/W
LDS
UDS
D8
D9
D10
D11
D12
A12
A11
A10
A9
A8
A7
A6
A5
FC0
A0
A1
A3
GND
A4
A2
FC1
CLK
DTACK
BG
BR
HALT
RESET
BERR
IPL1
VCC
MODE
GND
IPL2
AVEC
1
16
17
33
32
64
48
49
64 LEAD QFP and TQFP
IPL0
FC2
GND
MC68SEC000
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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