參數(shù)資料
型號： MC68LNC705C9ACFN
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 168/177頁
文件大?。?/td> 1941K
代理商： MC68LNC705C9ACFN
Serial Communications Interface (SCI)
Advance Information
MC68HC705C9A — Rev. 4.0
90
Serial Communications Interface (SCI)
MOTOROLA
9.7 Data Format
Receive data or transmit data is the serial data that is transferred to the
internal data bus from the receive data input pin (RDI) or from the
internal bus to the transmit data output pin (TDO). The non-return-to-
zero (NRZ) data format shown in Figure 9-3 is used and must meet the
following criteria:
The idle line is brought to a logic 1 state prior to
transmission/reception of a character.
A start bit (logic 0) is used to indicate the start of a frame.
The data is transmitted and received least significant bit first.
A stop bit (logic 1) is used to indicate the end of a frame. A frame
consists of a start bit, a character of eight or nine data bits, and a
stop bit.
A break is defined as the transmission or reception of a low
(logic 0) for at least one complete frame time.
Figure 9-3. Data Format
9.8 Receiver Wakeup Operation
The receiver logic hardware also supports a receiver wakeup function
which is intended for systems having more than one receiver. With this
function a transmitting device directs messages to an individual receiver
or group of receivers by passing addressing information as the initial
byte(s) of each message. The wakeup function allows receivers not
addressed to remain in a dormant state for the remainder of the
unwanted message. This eliminates any further software overhead to
service the remaining characters of the unwanted message and thus
improves system performance.
IDLE LINE
012345678
0
STOP START
START
CONTROL BIT M SELECTS
8- OR 9-BIT DATA
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