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參數(shù)資料
| 型號(hào)： | MC68L11D0CFBE2R |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 40/124頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8BIT 192RAM 44-QFP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | HC11 |
| 核心處理器： | HC11 |
| 芯體尺寸： | 8-位 |
| 速度： | 2MHz |
| 連通性： | SCI，SPI |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 26 |
| 程序存儲(chǔ)器類型： | ROMless |
| RAM 容量： | 192 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-QFP |
| 包裝： | 帶卷 (TR) |
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CENTRAL PROCESSING UNIT
3-2
TECHNICAL DATA
3.1.1 Accumulators A, B, and D
Accumulators A and B are general-purpose 8-bit registers that hold operands and re-
sults of arithmetic calculations or data manipulations. For some instructions, these two
accumulators are treated as a single double-byte (16-bit) accumulator called accumu-
lator D. Although most operations can use accumulators A or B interchangeably, the
following exceptions apply:
The ABX and ABY instructions add the contents of 8-bit accumulator B to the contents
of 16-bit register X or Y, but there are no equivalent instructions that use A instead of B.
The TAP and TPA instructions transfer data from accumulator A to the condition code
register, or from the condition code register to accumulator A, however there are no
equivalent instructions that use B rather than A.
The decimal adjust accumulator (DAA) instruction is used after binary-coded decimal
(BCD) arithmetic operations, but there is no equivalent BCD instruction to adjust ac-
cumulator B.
The add, subtract, and compare instructions associated with both A and B (ABA, SBA,
and CBA) only operate in one direction, making it important to plan ahead to ensure
the correct operand is in the correct accumulator.
3.1.2 Index Register X (IX)
The IX register provides a 16-bit indexing value that can be added to the 8-bit offset
provided in an instruction to create an effective address. The IX register can also be
used as a counter or as a temporary storage register.
3.1.3 Index Register Y (IY)
The 16-bit IY register performs an indexed mode function similar to that of the IX reg-
ister. However, most instructions using the IY register require an extra byte of machine
code and an extra cycle of execution time because of the way the opcode map is im-
plemented. Refer to 3.3 Opcodes and Operands for further information.
3.1.4 Stack Pointer (SP)
The M68HC11 CPU has an automatic program stack. This stack can be located any-
where in the address space and can be any size up to the amount of memory available
in the system. Normally the SP is initialized by one of the first instructions in an appli-
cation program. The stack is configured as a data structure that grows downward from
high memory to low memory. Each time a new byte is pushed onto the stack, the SP
is decremented. Each time a byte is pulled from the stack, the SP is incremented. At
any given time, the SP holds the 16-bit address of the next free location in the stack.
Figure 3-2 is a summary of SP operations.
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| MC68L11D0FNE2 | 功能描述:8位微控制器 -MCU 8B MCU 192RAM LVDC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| MC68L11E0FNE2 | 功能描述:IC MCU 8BIT LV 512RAM 52-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:8KB（8K x 8） 程序存儲(chǔ)器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285 |
| MC68L11E1CFNE2 | 功能描述:8位微控制器 -MCU 8B MCU RAM EE A/D LVDC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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