- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45247 > MC68HSC05C8FB (MOTOROLA INC) 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44 PDF資料下載
參數(shù)資料
| 型號： | MC68HSC05C8FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 95/156頁 |
| 文件大?。?/td> | 1755K |
| 代理商： | MC68HSC05C8FB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁當(dāng)前第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁
Interrupts
External Interrupt (IRQ)
MC68HC05C8A — Rev. 4.0
Advance Information
MOTOROLA
Interrupts
43
4.5 External Interrupt (IRQ)
If the interrupt mask bit (I bit) of the CCR is set, all maskable interrupts
(internal and external) are disabled. Clearing the I bit enables interrupts.
The interrupt request is latched immediately following the falling edge of
IRQ. It is then synchronized internally and serviced as specified by the
contents of $1FFA and $1FFB.
When any of the port B pullups are enabled, that pin becomes an
additional external interrupt source which is coupled to the IRQ pin logic.
It follows the same edge/edge-level selection that the IRQ pin has. See
Either a level-sensitive and edge-sensitive trigger, or an edge-sensitive-
only trigger operation is selectable by mask option.
NOTE:
The internal interrupt latch is cleared in the first part of the interrupt
service routine; therefore, one external interrupt pulse could be latched
and serviced as soon as the I bit is cleared.
4.6 Timer Interrupt
Three different timer interrupt flags cause a timer interrupt whenever
they are set and enabled. The interrupt flags are in the timer status
register (TSR), and the enable bits are in the timer control register
(TCR). Any of these interrupts will vector to the same interrupt service
routine, located at the address specified by the contents of memory
locations $1FF8 and $1FF9.
4.7 Serial Communications Interrupt (SCI)
Five different SCI interrupt flags cause an SCI interrupt whenever they
are set and enabled. The interrupt flags are in the SCI status register
(SCSR), and the enable bits are in the SCI control register 2 (SCCR2).
Any of these interrupts will vector to the same interrupt service routine,
located at the address specified by the contents of memory locations
$1FF6 and $1FF7.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05C8MFB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05C8FN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05C8B | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
| MC68HC05C8FB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05C8MB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HSC705C8ACFB | 制造商:Rochester Electronics LLC 功能描述:8 BIT MCU, 304 BYTES RAM - Bulk |
| MC68HSC705C8ACP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HSC705C8ACS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HSC705J1ACDW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HSC705J1ACP | 制造商:Rochester Electronics LLC 功能描述:8 BIT MCU, 64 BYTES RAM - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。