參數(shù)資料
型號: MC68HCL05C12AFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 120/156頁
文件大?。?/td> 756K
代理商: MC68HCL05C12AFB
NON-DISCLOSURE
AGREEMENT
REQUIRED
Serial Communications Interface (SCI)
General Release Specification
MC68HC05C12A Rev. 3.0
66
Serial Communications Interface (SCI)
MOTOROLA
When the shift register is not transmitting a character, the PD1/TDO pin
goes to the idle condition, logic 1. If software clears the TE bit during the
idle condition, and while TDRE is set, the transmitter relinquishes control
of the PD1/TDO pin.
Figure 9-2. SCI Transmitter
0
T8
SCDR ($0011)
6
BIT 7
5
4321
BIT 0
BAUD RATE REGISTER (BAUD)
SCP0
SCR2
SCR1
$000D
R8
SCI CONTROL REGISTER 1 (SCCR1)
M
WAKE
$000E
TCIE
TIE
SCI CONTROL REGISTER 2 (SCCR2)
RIE
ILIE
TE
RE
RWU
SBK
$000F
SCP1
TC
TDRE
SCI STATUS REGISTER (SCSR)
RDRF
IDLR
OR
NF
$0010
BIT 6
BIT 7
SCI DATA REGISTER (SCDR)
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
$0011
FE
0
TRANSMIT SHIFT REGISTER
7
6
5
4
3
2
1
0
8
H
L
TRANSMITTER
CONTROL LOGIC
LO
AD
FR
OM
SCDR
SHIFT
ENABLE
PREAMBLE
(ALL
LOGIC
ONES)
BREAK
(ALL
LOGIC
ZER
OS)
TDRE
TC
M
T8
TE
PIN BUFFER
AND CONTROL
PD1/
TDO
INTERNAL DATA BUS
SBK
TIE
TCIE
SCI
RECEIVE
REQUESTS
SCI
INTERRUPT
REQUEST
1X
BAUD RATE
CLOCK
0
SCR0
0
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