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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC68HC908JK3CP
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 43/212闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 8MHZ 4K FLASH 20-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 18
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
澶栧湇瑷�(sh猫)鍌欙細 LED锛孡VD锛孭OR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 15
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 4KB锛�4K x 8锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ(l猫i)鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 3.3 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 12x8b
鎸暕鍣ㄥ瀷锛� 澶栭儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 20-DIP锛�0.300"锛�7.62mm锛�
鍖呰锛� 绠′欢
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Timer Interface Module (TIM)
MC68H(R)C908JL3 鈥� Rev. 1.1
Technical Data
Freescale Semiconductor
Timer Interface Module (TIM)
135
Figure 10-8. CHxMAX Latency
10.10.5 TIM Channel Registers (TCH0H/L:TCH1H/L)
These read/write registers contain the captured TIM counter value of the
input capture function or the output compare value of the output
compare function. The state of the TIM channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIM channel x registers (TCHxH) inhibits input captures until the low
byte (TCHxL) is read.
In output compare mode (MSxB:MSxA
鈮� 0:0), writing to the high byte of
the TIM channel x registers (TCHxH) inhibits output compares until the
low byte (TCHxL) is written.
OUTPUT
OVERFLOW
TCHx
PERIOD
CHxMAX
OVERFLOW
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
MC68HC908JK3CDW IC MCU 8MHZ 4K FLASH 20-SOIC
MC68HC908JK1CP IC MCU 8MHZ 1.5K FLASH 20-DIP
MC68HC908JK1CDW IC MCU 8MHZ 1.5K FLASH 20-SOIC
EHFW2BX CONN EEE1394 FEMALE STR T/H BLK
EHFWX2BPKG CONN EEE1394 FMAL T/H CROSS BLK
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MC68HC908JK3ECDW 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8 Bit 8MHz RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
MC68HC908JK3ECP 鍔熻兘鎻忚堪:IC MCU 4K FLASH 8MHZ 20-DIP RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:HC08 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:56F8xxx 鏍稿績铏曠悊鍣�:56800E 鑺珨灏哄:16-浣� 閫熷害:60MHz 閫i€氭€�:CAN锛孲CI锛孲PI 澶栧湇瑷�(sh猫)鍌�:POR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):21 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲�:40KB锛�20K x 16锛� 绋嬪簭瀛樺劜(ch菙)鍣ㄩ(l猫i)鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:6K x 16 闆诲 - 闆绘簮 (Vcc/Vdd):2.25 V ~ 3.6 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:A/D 6x12b 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:48-LQFP 鍖呰:鎵樼洡(p谩n) 閰嶇敤:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
MC68HC908JK8CDW 鍔熻兘鎻忚堪:IC MCU 8K FLASH 8MHZ 20-SOIC RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:HC08 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STM32F101T8 View All Specifications 鐗硅壊鐢�(ch菐n)鍝�:STM32 32-bit Cortex MCUs 妯�(bi膩o)婧�(zh菙n)鍖呰:490 绯诲垪:STM32 F1 鏍稿績铏曠悊鍣�:ARM? Cortex?-M3 鑺珨灏哄:32-浣� 閫熷害:36MHz 閫i€氭€�:I²C锛孖rDA锛孡IN锛孲PI锛孶ART/USART 澶栧湇瑷�(sh猫)鍌�:DMA锛孭DR锛孭OR锛孭VD锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):26 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲�:64KB锛�64K x 8锛� 绋嬪簭瀛樺劜(ch菙)鍣ㄩ(l猫i)鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:10K x 8 闆诲 - 闆绘簮 (Vcc/Vdd):2 V ~ 3.6 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:A/D 10x12b 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:36-VFQFN锛�36-VFQFPN 鍖呰:鎵樼洡(p谩n) 閰嶇敤:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2鏇村... 鍏跺畠鍚嶇ū(ch膿ng):497-9032STM32F101T8U6-ND
MC68HC908JK8MDWE 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪:
MC68HC908JK8MP 鍒堕€犲晢:Motorola Inc 鍔熻兘鎻忚堪: 鍒堕€犲晢:MOTOROLA 鍔熻兘鎻忚堪: