參數(shù)資料
型號(hào)： MC68HC711EA9VP3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP56
封裝： PLASTIC, SDIP-56
文件頁(yè)數(shù)： 3/58頁(yè)
文件大?。?/td> 583K
代理商： MC68HC711EA9VP3
MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
11
4.3 Test Mode
Test mode, a variation of the expanded mode, is primarily used during Motorola's internal production
testing; however, it is accessible for programming the CONFIG register, programming calibration data
into EEPROM, and supporting emulation and debugging during development. Refer to Figure 6.
4.4 Bootstrap Mode
Bootstrap mode is a special variation of the single-chip mode. Bootstrap mode allows special-purpose
programs to be entered into internal RAM. When boot mode is selected at reset, a small bootstrap ROM
becomes present in the memory map. Reset and interrupt vectors are located in this ROM at $BFC0–
$BFFF. The bootstrap ROM contains a small program which initializes the SCI and allows the user to
download a program into on-chip RAM. The size of the downloaded program can be as large as the size
of the on-chip RAM. After a four-character delay, or after receiving the character for the highest address
in RAM, control passes to the loaded program at $0000. Refer to Figure 6.
4.5 Mode Selection
The four mode variations are selected by the logic levels present on the MODA and MODB pins during
reset. The MODA and MODB logic levels determine the logic state of SMOD and the MDA control bits
in the highest priority I-bit interrupt and miscellaneous (HPRIO) register. See Table 2 for further infor-
mation.
After reset is released, the mode select pins no longer influence the MCU operating mode. In single-
chip operating mode, the MODA pin is connected to a logic level zero. In expanded mode, MODA is
normally connected to VDD through a pull-up resistor of 4.7 k. The MODA pin also functions as the
load instruction register (LIR) pin when the MCU is not in reset. The LIR signal is useful during program
debugging. The open-drain active low LIR output pin drives low during the first E cycle of each instruc-
tion. The MODB pin also functions as standby power input (VSTBY), which allows RAM contents to be
maintained in absence of VDD.
*The reset values of RBOOT, SMOD, and MDA depend on the mode selected at power up.
RBOOT — Read Bootstrap ROM/EPROM
Valid only when SMOD is set (bootstrap or special test mode). Can only be written in special modes.
0 = Bootstrap ROM disabled and not in map
1 = Bootstrap ROM enabled and in map at $BF00–$BFFF
SMOD and MDA — Special Mode Select and Mode Select A
These two bits can be read at any time. They can be written anytime in special modes. MDA can only
be written once in normal modes. SMOD cannot be set once it has been cleared.
HPRIO — Highest Priority I-bit Interrupt and Miscellaneous
$103C
BIT 7
654321
BIT 0
RBOOT*
SMOD*
MDA*
IRVNE
PSEL3
PSEL2
PSEL1
PSEL0
RESET:
00000000
Table 2 Operating Mode Selection
Inputs
Mode
Latched at Reset
MODA MODB
MDA
SMOD
0
1
Single Chip
0
1
Expanded
1
0
Bootstrap
0
1
0
Special Test
1
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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