參數(shù)資料
型號: MC68HC711EA9MP3
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP56
封裝: PLASTIC, SDIP-56
文件頁數(shù): 20/58頁
文件大小: 583K
代理商: MC68HC711EA9MP3
MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
27
STAF — Strobe A Interrupt Status Flag
This bit is set when a selected edge occurs on Strobe A. Clearing it depends on the state of the HNDS
and OIN bits. In simple strobed mode or in full handshake mode, STAF is cleared by a read of the PIOC
register followed by a read of PORTCL register. In output handshake mode, STAF is cleared by reading
the PIOC register followed by a write to PORTCL register.
0 = No edge detected on strobe A
1 = The selected edge (rising or falling) has been detected on strobe A
STAI — Strobe A Interrupt Enable
When bit I in the condition code register is clear and STAI is set, STAF (when set) will request an inter-
rupt.
0 = STAF will not generate an interrupt when set.
1 = STAF will generate an interrupt when set.
CWOM — Port C Wire-OR Mode
CWOM affects all eight port A pins.
0 = Port C outputs are normal CMOS outputs
1 = Port C outputs act as open-drain outputs
HNDS — Handshake Mode
When clear, strobe A acts as a simple input strobe to latch data into PORTCL, and strobe B acts as a
simple output strobe which pulses after a write to port B. When set, a handshake protocol involving port
C, STRA, and STRB is selected (see the definition for the OIN bit).
0 = Simple strobe mode
1 = Full input or output handshake mode
OIN — Output or Input Handshaking
This bit has no meaning or effect when HNDS = 0.
0 = Input handshake
1 = Output handshake
PLS — Pulse/Interlocked Handshake Operation
This bit has no meaning if HNDS = 0. When interlocked handshake operation is selected, strobe B, once
activated, stays active until the selected edge of strobe A is detected. When pulsed handshake opera-
tion is selected, strobe B is pulsed for two E cycles.
0 = Interlocked handshake selected
1 = Pulsed handshake selected
EGA — Active Edge for Strobe A
0 = Falling edge of strobe A selected. When output handshake is selected, port C lines obey the
data direction register while STRA is low, but port C is forced to output when STRA is high.
1 = Rising edge of strobe A selected. When output handshake is selected, port C lines obey the
data direction register while STRA is high, but port C is forced to output when STRA is low.
INVB — Invert Strobe B
0 = Active level is logic zero
1 = Active level is logic one
PIOC — Port I/O Control
$1002
BIT 7
654321
BIT 0
STAF
STAI
CWOM
HNDS
OIN
PLS
EGA
INVB
RESET:
00000000
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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