
Analog-to-Digital (A/D) Converter
Data Sheet
M68HC11E Family — Rev. 5
64
Analog-to-Digital (A/D) Converter
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MOTOROLA
Figure 3-1. A/D Converter Block Diagram
Figure 3-2. Electrical Model of an A/D Input Pin (Sample Mode)
8-BIT CAPACITIVE DAC
WITH SAMPLE AND HOLD
SUCCESSIVE APPROXIMATION
REGISTER AND CONTROL
RESULT
PE0
AN0
PE1
AN1
PE2
AN2
PE3
AN3
PE4
AN4
PE5
AN5
PE6
AN6
PE7
AN7
ANALOG
MUX
V
RH
V
Rl
ADCTL A/D CONTROL
C
S
M
C
C
C
C
INTERNAL
DATA BUS
ADR1 A/D RESULT 1
ADR2 A/D RESULT 2
ADR3 A/D RESULT 3
ADR4 A/D RESULT 4
RESULT REGISTER INTERFACE
DIFFUSION/POLY
COUPLER
< 2 pF
400 nA
JUNCTION
LEAKAGE
+ ~20 V
– ~0.7 V
*
* THIS ANALOG SWITCH IS CLOSED ONLY DURING THE 12-CYCLE SAMPLE TIME.
V
RL
INPUT
+ ~12V
– ~0.7V
PROTECTION
DEVICE
e 4 k
DUMMY N-CHANNEL
OUTPUT DEVICE
ANALOG
INPUT
PIN
~ 20 pF
DAC
CAPACITANCE
F
Freescale Semiconductor, Inc.
n
.