參數(shù)資料
型號: MC68HC705P9CDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 14/156頁
文件大?。?/td> 957K
代理商: MC68HC705P9CDWR2
SIOP
Operation
110
SIOP
MOTOROLA
Operation
The master MCU initiates and controls the transfer of data to and from
one or more slave peripheral devices. In master mode, a transmission is
initiated by writing to the SIOP data register (SDR). Data written to the
SDR is parallel-loaded and shifted out serially to the slave device(s).
Many simple slave devices are designed to only receive data from a
master or to only supply data to a master. For example, when a
serial-to-parallel shift register is used as an 8-bit port, the master MCU
initiates transfers of 8-bit data values to the shift register. Since the
serial-to-parallel shift register does not send any data to the master, the
MCU ignores whatever it receives as a result of the transmission.
The SIOP is simpler than the serial peripheral interface (SPI) on some
other Motorola MCUs in that:
The polarity of the serial clock is fixed.
There is no slave select pin.
The direction of serial data does not automatically switch as on the
SPI because the SIOP is not intended for use in multimaster
systems. Most applications use one MCU as the master to initiate
and control data transfer between one or more slave peripheral
devices.
A programmable option allows the SIOP to transfer data MSB first or
LSB first.
4-siop_a
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