參數(shù)資料
型號： MC68HC705C9ACB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： Microcontrollers
中文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP42
封裝： PLASTIC, SHRINK, DIP-42
文件頁數(shù)： 112/160頁
文件大小： 2076K
代理商： MC68HC705C9ACB
Serial Peripheral Interface (SPI)
Advance Information
MC68HC705C9A — Rev. 4.0
112
Serial Peripheral Interface (SPI)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
SPIF set) followed by an access of the SPDR. Following the initial
transfer, unless SPSR is read (with SPIF set) first, attempts to write to
SPDR are inhibited.
WCOL — Write Collision Bit
The write collision bit is set when an attempt is made to write to the
serial peripheral data register while data transfer is taking place. If
CPHA is 0, a transfer is said to begin when SS goes low and the
transfer ends when SS goes high after eight clock cycles on SCK.
When CPHA is 1, a transfer is said to begin the first time SCK
becomes active while SS is low and the transfer ends when the SPIF
flag gets set. Clearing the WCOL bit is accomplished by reading the
SPSR (with WCOL set) followed by an access to SPDR.
MODF — Mode Fault
The mode fault flag indicates that there may have been a multi-master
conflict for system control and allows a proper exit from system
operation to a reset or default system state. The MODF bit is normally
clear, and is set only when the master device has its SS pin pulled
low. Setting the MODF bit affects the internal serial peripheral
interface system in the following ways.
1.
An SPI interrupt is generated if SPIE = 1.
2.
The SPE bit is cleared. This disables the SPI.
3.
The MSTR bit is cleared, thus forcing the device into the slave
mode.
Clearing the MODF bit is accomplished by reading the SPSR (with
MODF set), followed by a write to the SPCR. Control bits SPE and
MSTR may be restored by user software to their original state during
this clearing sequence or after the MODF bit has been cleared. When
configured as an MC68HC05C9A, it is also necessary to restore
DDRD after a mode fault.
Bits 5 and 3–0 — Not Implemented
These bits always read 0.
F
Freescale Semiconductor, Inc.
n
.
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