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M68HC16 Z SERIES
REGISTER SUMMARY
MOTOROLA
USER’S MANUAL
D-13
The following equation calculates the time-out period for an externally input clock fre-
quency on both slow and fast reference frequency devices, when fsys is equal to the
system clock frequency.
HME — Halt Monitor Enable
0 = Halt monitor is disabled.
1 = Halt monitor is enabled.
BME — Bus Monitor External Enable
0 = Disable bus monitor for external bus cycles.
1 = Enable bus monitor for external bus cycles.
BMT[1:0] — Bus Monitor Timing
This field selects the bus monitor time-out period. Refer to Table D-7.
D.2.13 Periodic Interrupt Control Register
PICR sets the interrupt level and vector number for the periodic interrupt timer (PIT).
Bits [10:0] can be read or written at any time. Bits [15:11] are unimplemented and al-
ways read zero.
PIRQL[2:0] — Periodic Interrupt Request Level
This field determines the priority of periodic interrupt requests. A value of %000 dis-
ables PIT interrupts.
Table D-7 Bus Monitor Time-Out Period
BMT[1:0]
Bus Monitor Time-Out Period
00
64 system clocks
01
32 system clocks
10
16 system clocks
11
8 system clocks
PICR — Periodic Interrupt Control Register
$YFFA22
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PIRQL[2:0]
PIV[7:0]
RESET:
0
1
Time-out Period
128
() Divide Ratio Specified by SWP and SWT[1:0]
()
f
ref
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=
Time-out Period
Divide Ratio Specified by SWP and SWT[1:0]
f
sys
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=