
MOTOROLA
D-20
REGISTER SUMMARY
MC68HC16R1/916R1
USER’S MANUAL
D.2.24 Chip-Select Base Address Register Boot
D.2.25 Chip-Select Base Address Registers
Each chip-select pin has an associated base address register. A base address is the
lowest address in the block of addresses enabled by a chip select. CSBARBT contains
the base address for selection of a boot memory device. Bit and field definitions for
CSBARBT and CSBAR[0:10] are the same, but reset block sizes differ. These
registers may be read or written at any time.
ADDR[23:11] — Base Address
This field sets the starting address of a particular chip-select’s address space. The
address compare logic uses only the most significant bits to match an address within
a block. The value of the base address must be an integer multiple of the block size.
Base address register diagrams show how base register bits correspond to address
lines.
BLKSZ[2:0] — Block Size Field
This field determines the size of the block that is enabled by the chip-select.
Table D-12
shows bit encoding for the base address registers block size field.
Table D-11 Reset Pin Function of CS[10:6]
Data Bus Pins at Reset
Chip-Select/Address Bus Pin Function
CS10/
ADDR23
ADDR22
ADDR21
CS10
CS9
CS10
CS9
CS10
CS9
CS10
CS9
ADDR21 ADDR20 ADDR19
CS10
ADDR22 ADDR21 ADDR20 ADDR19
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
DATA7
DATA6
DATA5
DATA4
DATA3
CS9/
CS8/
CS7/
ADDR20
CS7
CS7
ADDR20 ADDR19
CS6/
ADDR19
CS6
ADDR19
1
1
1
1
1
0
1
1
1
1
0
X
1
1
1
0
X
1
1
0
X
X
X
1
0
X
X
X
X
CS8
CS8
CS8
CSBARBT —
Chip-Select Base Address Register Boot
$YFFA48
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
CSBAR[0:10] —
Chip-Select Base Address Registers
$YFFA4C–$YFFA74
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0