參數(shù)資料
型號(hào): MC68HC11N4
廠商: Motorola, Inc.
元件分類: 8位微控制器
英文描述: 8-Bit microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件頁(yè)數(shù): 6/24頁(yè)
文件大?。?/td> 261K
代理商: MC68HC11N4
MOTOROLA
6
AN1215/D
OVF — Overflow Flag
OVF is set if overflow from MSB on CREG is detected. This bit is cleared automatically by a write to this
register with bit 2 set.
DZF — Divide by Zero Flag
DZF is set if a divide by zero condition is detected. DZF is cleared automatically by a write to this register
with bit 1 set.
ACF — Arithmetic Completion Flag
ACF is set by completion of the arithmetic operation. ACF is cleared automatically by a write to this reg-
ister with bit 0 set.
Data register A (AREG) can hold either a 16-bit multiplicand or a 16-bit divisor. Data register B (BREG) can
hold either a 16-bit multiplier or a 16-bit remainder after division. Data register C (CREG), which is treated
as two 16-bit registers (CREG High and CREG Low), can hold a 32-bit product or accumulated product after
multiplication, or it can hold a 32-bit numerator before division and a 32-bit quotient after division. There is
an implied fixed radix point to the right of bits AREG0, BREG0, and CREG0.
Table 2
shows fractional numeric representation.
shows numeric ranges of ALU registers.
Table 3
shows typical data register formats.
shows signed expression of numbers. Table 4
Figure 3
Table 2 Numeric Ranges of ALU Registers
Register
AREG
BREG
CREG
Size
16 bits
16 bits
32 bits
Unsigned
0 to 65535
0 to 65535
0 to 4,294,967,295
Signed
–32,768 to +32,767
–32,768 to +32,767
–2,147,483,648 to +2,147,483,647
Table 3 Representation of Signed Numbers
Decimal
+2,147,483,647
+32,767
+1
0
–1
–2
–32,768
–2,147,483,647
16-Bit Hexadecimal
$7FFF
$0001
$0000
$FFFF
$FFFE
$8000
32-Bit Hexadecimal
$7FFF FFFF
$0000 7FFF
$0000 0001
$0000 0000
$FFFF FFFF
$FFFF FFFE
$FFFF 8000
$8000 0000
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