Serial Peripheral Interface (SPI)
Data Sheet
M68HC11E Family — Rev. 5
140
Serial Peripheral Interface (SPI)
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MOTOROLA
WCOL — Write Collision Bit
Clearing the WCOL bit is accomplished by reading the SPSR (with WCOL set)
followed by an access of SPDR. Refer to
8.5.4 Slave Select
and
8.6 SPI
System Errors
.
0 = No write collision
1 = Write collision
Bit 5 — Unimplemented
Always reads 0
MODF — Mode Fault Bit
To clear the MODF bit, read the SPSR (with MODF set), then write to the SPCR.
Refer to
8.5.4 Slave Select
and
8.6 SPI System Errors
.
0 = No mode fault
1 = Mode fault
Bits [3:0] — Unimplemented
Always read 0
8.7.3 Serial Peripheral Data I/O Register
The SPDR is used when transmitting or receiving data on the serial bus. Only a
write to this register initiates transmission or reception of a byte, and this only
occurs in the master device. At the completion of transferring a byte of data, the
SPIF status bit is set in both the master and slave devices.
A read of the SPDR is actually a read of a buffer. To prevent an overrun and the
loss of the byte that caused the overrun, the first SPIF must be cleared by the time
a second transfer of data from the shift register to the read buffer is initiated.
SPI is double buffered in and single buffered out.
Address:
$102A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
Figure 8-5. Serial Peripheral Data I/O Register (SPDR)
F
Freescale Semiconductor, Inc.
n
.
