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Technical Data
MC68HC11E Family — Rev. 4
36
Pin Descriptions
MOTOROLA
Pin Descriptions
2.6 E-Clock Output (E)
E is the output connection for the internally generated E clock. The signal
from E is used as a timing reference. The frequency of the E-clock output
is one fourth that of the input frequency at the XTAL and EXTAL pins.
When E-clock output is low, an internal process is taking place. When it
is high, data is being accessed.
All clocks, including the E clock, are halted when the MCU is in stop
mode. To reduce RFI emissions, the E-clock output of most E-series
devices can be disabled while operating in single-chip modes.
The E-clock signal is always enabled on the MC68HC811E2.
2.7 Interrupt Request (IRQ)
The IRQ input provides a means of applying asynchronous interrupt
requests to the MCU. Either negative edge-sensitive triggering or
level-sensitive triggering is program selectable (OPTION register). IRQ
is always configured to level-sensitive triggering at reset. When using
IRQ in a level-sensitive wired-OR configuration, connect an external
pullup resistor, typically 4.7 k
, to V
DD.
2.8 Non-Maskable Interrupt (XIRQ/VPPE)
The XIRQ input provides a means of requesting a non-maskable
interrupt after reset initialization. During reset, the X bit in the condition
code register (CCR) is set and any interrupt is masked until MCU
software enables it. Because the XIRQ input is level-sensitive, it can be
connected to a multiple-source wired-OR network with an external pullup
resistor to VDD. XIRQ is often used as a power loss detect interrupt.
Whenever XIRQ or IRQ is used with multiple interrupt sources each
source must drive the interrupt input with an open-drain type of driver to
avoid contention between outputs.
NOTE:
IRQ must be configured for level-sensitive operation if there is more than
one source of IRQ interrupt.