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參數(shù)資料
| 型號： | MC68HC11C0FN3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 3 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 24/76頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MC68HC11C0FN3 |
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MOTOROLA
MC68HC11C0
30
MC68HC11C0TS/D
Notes:
1. If a pin is configured for general-purpose I/O, the DDRD bit controls the direction of data.
2. If a pin is configured as MISO, the MSTR and DDRD bit control the direction of data.
3. SPE is the SPI enable bit, MSTR is the master/slave select bit. Refer to the SPCR register.
4. XIRQ or MISO inputs are internally pulled high if not used. This does not affect the pin.
Notes:
1. If a pin is configured for general-purpose I/O, the DDRD bit controls the direction of data.
2. If a pin is configured for RxD input, there is no weak pull-up at the pin.
3. If a pin is configured for TxD output, the output can be either an open-drain output or a CMOS driver. This
is controlled by the port D driver output mode (DODM) register.
4. TE is the transmitter enable bit. RE is the receiver enable bit. Refer to the SCCR2 register.
NOTE
If any of the pins PD[5:2] are configured as SPI inputs they will not have pull-ups.
If any of the pins PD[5:2] are configured as SPI outputs they will be either open-
drain outputs or normal CMOS driver outputs depending on the state of the corre-
sponding bit in the DODM register.
Each DODM bit controls an individual port D pin and is valid only if the pin is configured as an output.
Table 5 PD2 Configuration
SPI Enable
DIOCTL
Bit 3
DIOCTL
Bit 2
PD2
Pull-Up
Control
Output
Enable
SPE = 0
0
X
I/O
DDD[3:2]
1
0
XIRQ
On
Off
1
I/O
DDD[3:2]
SPE = 1
0
X
I/O
DDD[3:2]
1
0
XIRQ
On
Off
1
MISO
Off
MSTR + DDD[3:2]
Table 6 PD[1:0] Configuration
DIOCTL
Bit 0
SCI Enables
PD1
Pull-Up
Control
SCI Enables
PD0
Pull-Up
Control
SCI
Mode
0
TE = 1
TxD
Off
RE = 1
RxD
Off
Two Wire
TE = 0
I/O
DDD1
RE = 0
I/O
DDD0
1
TE = 1
TxD
Off
X
I/O
DDD0
Single Wire
RE = 0
TE = 1
RxD
Off
RE = 0
TE = 1
RxD/TxD
Off
RE = 0
Looped
TE = 1
I/O
DDD1
RE = 0
DODM — Port D Open Drain Mode
$0075
Bit 7
654321
Bit 0
—
DOD6
DOD5
DOD4
DOD3
DOD2
DOD1
DOD0
RESET:
00111100
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