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| 型號： | MC68HC11A8BMP2 |
| 廠商： | ABILIS SYSTEMS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP48 |
| 封裝： | PLASTIC, DIP-48 |
| 文件頁數(shù)： | 132/158頁 |
| 文件大小： | 3803K |
| 代理商： | MC68HC11A8BMP2 |
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PROGRAMMABLE TIMER, RTI, AND PULSE ACCUMULATOR
MOTOROLA
TECHNICAL DATA
8-5
8
8.1.9 Timer Control Register 2 (TCTL2)
Bits 7-6 — Not Implemented
These bits always read zero.
EDGxB and EDGxA — Input Capture x Edge Control.
These two bits (EDGxB and EDGxA) are cleared to zero by reset and are encoded to
configure the input sensing logic for input capture x as follows:
8.1.10 Timer Interrupt Mask Register 1 (TMSK1)
OCxl — Output Compare x Interrupt
If the OCxl enable bit is set when the OCxF flag bit is set, a hardware interrupt se-
quence is requested.
ICxl — Input Capture x Interrupt
If the ICxl enable bit is set when the ICxF flag bit is set, a hardware interrupt sequence
is requested.
8.1.11 Timer Interrupt Flag Register 1 (TFLG1)
Timer interrupt flag register 1 is used to indicate the occurrence of timer system
events, and together with the TMSK1 register allows the timer subsystem to operate
in a polled or interrupt driven system. For each bit in TFLG1, there is a corresponding
bit in TMSK1 in the same bit position. If the mask bit is set, each time the conditions
for the corresponding flag are met, a hardware interrupt sequence is requested as well
as the flag bit being set.
These timer system status flags are cleared by writing a one to the bit positions corre-
sponding to the flag(s) which are to be cleared. Bit manipulation instructions would be
inappropriate for flag clearing because they are read-modify-write instructions. Even
though the instruction mask implies that the programmer is only interested in some of
the bits in the manipulated location, the entire location is actually read and rewritten
which may clear other bits in the register.
7
654321
0
$1021
0
EDG1B
EDG1A
EDG2B
EDG2A
EDG3B
EDG3A
TCTL2
RESET
00000000
EDGxB
EDBxA
Configuration
0
Capture disabled
0
1
Capture on rising edges only
1
0
Capture on falling edges only
1
Capture on any (rising or falling) edge
7
654321
0
$1022
OC1I
OC2I
OC3I
OC4I
OC5I
IC1I
IC2I
IC3I
TMSK1
RESET
00000000
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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