參數(shù)資料
型號: MC68HC11A0FU1
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: ROM-based high-performance microcontrollers
中文描述: 基于ROM的高性能微控制器
文件頁數(shù): 102/124頁
文件大?。?/td> 840K
代理商: MC68HC11A0FU1
TIMING SYSTEM
9-16
TECHNICAL DATA
Figure 9-3 Pulse Accumulator
Pulse accumulator control bits are also located within two timer registers, TMSK2 and
TFLG2, as described in the following paragraphs.
Table 9-3 Pulse Accumulator Timing
Common XTAL Frequencies
Selected Crystal
4.0 MHz
1.0 MHz
1000 ns
8.0 MHz
2.0 MHz
500 ns
12.0 MHz
3.0 MHz
333 ns
CPU Clock
Cycle Time
Pulse Accumulator (in Gated Mode)
(E/2
6
)
(E/2
14
)
(E)
(1/E)
1 count -
overflow -
64.0 μs
16.384 ms
32.0 μs
8.192 ms
21.33 μs
5.461 ms
PACNT
8-BIT COUNTER
2:1
MUX
PA7/
PAI/OC1
ENABLE
OVERFLOW
1
2
INTERRUPT
REQUESTS
INTERNAL
DATA BUS
INPUT BUFFER
&
EDGE DETECTION
PACTL
TFLG2
TMSK2
P
P
D
P
P
P
P
P
11 PULSE ACC BLOCK
OUTPUT
BUFFER
PAI EDGE
PAEN
E ÷ 64 CLOCK
(FROM MAIN TIMER)
FROM
MAIN TIMER
OC1
DISABLE
FLAG SETTING
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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