參數(shù)資料
型號: MC68HC05P18A
廠商: Motorola, Inc.
英文描述: Low Cost HCMOS Microcontroller(低成本、8位HCMOS微控制器)
中文描述: 低成本HCMOS微控制器(低成本,8位HCMOS微控制器)
文件頁數(shù): 48/130頁
文件大?。?/td> 1200K
代理商: MC68HC05P18A
L
G
R
Resets
Technical Data
MC68HC05P18A
48
Resets
MOTOROLA
5.4.3 Low-Voltage Reset (LVR)
The internal LVR reset is generated when the supply voltage to the V
DD
pin falls below a nominal 3.80 Vdc. The LVR threshold is not intended to
be an accurate and stable trip point, but is intended to assure that the
CPU is held in reset when the V
DD
supply voltage is below reasonable
operating limits. If the LVR is tripped for a short time, the LVR reset
signal will last at least two cycles of the CPU bus clock, PH2. A mask
option is provided to disable the LVR.
The LVR generates the RST signal, which resets the CPU and other
peripherals. If any other reset function is active at the end of the LVR
reset signal, the RST signal remains in the reset condition until the other
reset condition(s) end.
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