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參數(shù)資料
| 型號(hào)： | MC68HC05J1ADW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 81/128頁(yè) |
| 文件大?。?/td> | 1279K |
| 代理商： | MC68HC05J1ADW |
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Technical Data
MC68HC05J1A — Rev. 3.0
56
Low-Power Modes
MOTOROLA
Low-Power Modes
Sets the IRQE bit in the IRQ status and control register to enable
external interrupts
Clears the I bit in the condition code register, enabling interrupts
Stops the internal oscillator, turning off the central processor unit
(CPU) clock and the timer clock, including the computer operating
properly (COP) watchdog
The STOP instruction does not affect any other registers or any
input/output (I/O) lines.
These conditions bring the MCU out of stop mode:
An external interrupt signal on the IRQ pin — A high-to-low
transition on the IRQ pin loads the program counter with the
contents of locations $07FA and $07FB.
An external interrupt signal on a port A external interrupt
pin — If the mask option for the port A external interrupt function
is selected, a low-to-high transition on a PA3–PA0 pin loads the
program counter with the contents of locations $07FA and $07FB.
External reset — A logic 0 on the RESET pin resets the MCU and
loads the program counter with the contents of locations $07FE
and $07FF.
When the MCU exits stop mode, processing resumes after a
stabilization delay of 4064 oscillator cycles.
6.4 Wait Mode
The WAIT instruction puts the MCU in an intermediate
power-consumption mode and has these effects on the MCU:
Clears the I bit in the condition code register, enabling interrupts
Sets the IRQE bit in the IRQ status and control register, enabling
external interrupts
Stops the central processor unit (CPU) clock, but allows the
internal oscillator and timer clock to continue to run
The WAIT instruction does not affect any other registers or any I/O lines.
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