參數(shù)資料
型號(hào)： MC68HC05C12AFN
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 99/156頁
文件大?。?/td> 3848K
代理商： MC68HC05C12AFN
Low-Power Modes
Stop Recovery
MC68HC05C12A — Rev. 3.0
General Release Specification
Low-Power Modes
NON-DISCLOSURE
AGREEMENT
REQUIRED
unaltered. All input/output lines remain unchanged. The processor can
be brought out of stop mode only by an external interrupt or reset.
6.4 Stop Recovery
The processor can be brought out of stop mode only by an external
interrupt or reset. See Figure 6-2.
6.5 Wait Mode
The WAIT instruction places the MCU in a low-power consumption
mode, but the wait mode consumes more power than the stop mode. All
CPU action is suspended, but the timer, SCI, SPI, and the oscillator
remain active. Any interrupt or reset will cause the MCU to exit wait
mode.
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and input/output lines remain in their previous
state. The timer may be enabled to allow a periodic exit from wait mode.
Figure 6-2. Stop Recovery Timing Diagram
1FFE
1FFF
INTERNAL ADDRESS BUS
INTERNAL CLOCK
IRQ
3
IRQ
2
RESET
OSC1
1
t
ILCH
4064 t
cyc
RESET ($1FFE, $1FFF) OR
INTERRUPT ($1FFA, $1FFB)
VECTOR FETCH
t
ILIH
t
RL
NOTES:
1.
Represents the internal gating of the OSC1 pin
2.
IRQ pin edge-sensitive option
3.
IRQ pin level and edge sensitive option
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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