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MC68F375
CONFIGURABLE TIMER MODULE (CTM9)
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
13-55
48, 96, 192, 384, and 768. The seventh selectable clock source is an external pin,
which may trigger on the rising or falling edge of the input signal. The external input
allows the counter to use a frequency not based on the microcontroller oscillator. An
alternate use for the external clock source is for event or pulse counting.
13.10 CTM9 Interrupts
The CTM9 is able to generate a diverse set of interrupts on the IMB3. Each interrupting
submodule is capable of requesting an interrupt on any of seven levels. A 3-bit level
number and a 1-bit arbitration number included in each submodule are initialized by
the software. The 3-bit level number selects which of the seven interrupt signals on the
IMB are driven by that submodule to create an interrupt request. Of the four priority
bits provided on the IMB3 during arbitration among the modules, one of them comes
from the interrupting submodule and the CTM9 BIUSM provides the other three. Thus,
the CTM9 may respond to two of the possible fifteen arbitration numbers.
During the IMB3 arbitration process, the CTM9 BIUSM manages the separate arbitra-
tion among the CTM9 submodules to determine which submodule will respond. Of the
submodules which have an interrupt request pending at the level being arbitrated on
the IMB, the submodule which has the lowest address is given the highest priority to
respond.
Following the interrupt arbitration process, the CTM9 provides an 8-bit vector number.
Six of the eight bits are provided by the interrupting submodule. Of the submodules
produced to date, a submodule can identify up to two separate interrupt causes, each
with unique interrupt vectors. The high-order two bits of the 8-bit vector are provided
by the CTM9 BIUSM. The low order six vector bits identify the highest priority interrupt
request pending in the CTM9 at the beginning of the arbitration cycle.
13.11 CTM9 Function Examples
The versatility of the CTM9 timer architecture is based on multiple counters and cap-
ture/compare channel units interconnected on time-base buses. Rather than present
block diagrams of each submodule, this section includes some typical application
examples — to show how the submodules can be interconnected to form timing func-
tions. The diagrams used to illustrate these examples show only the blocks utilized for
that function.
To illustrate the timing range of the CTM9 in different applications, many of the follow-
ing paragraphs include time intervals quoted in microseconds and seconds. The
assumptions used are that the microcontroller system clock is at 16.78 MHz with min-
imum prescaling (0.119 microsecond cycle) and with the maximum prescaling (48.0
microsecond cycle). For other system clock cycle rates and prescaler choices, the
times mentioned in these paragraphs scale appropriately.
13.11.1 CTM9 Single Input Capture
The CTM9 single-action submodule (SASM) has an input capture register to latch the
current state of a time-base bus when an external input edge is detected. The SASM
is software programmable to latch on the rising or falling edge of the input signal. The
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