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參數(shù)資料
| 型號： | MC68EN360ZQ33L |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 0K |
| 描述： | IC MPU QUICC 32BIT 357-PBGA |
| 標(biāo)準(zhǔn)包裝： | 44 |
| 系列： | M683xx |
| 處理器類型： | M683xx 32-位 |
| 速度： | 33MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應(yīng)商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 托盤 |
Memory (SRAM), Electrically Programmable Read-Only Memory (EPROM), Flash EPROM, etc.
— Four CAS lines, Four WE lines, One OE line
— Boot Chip Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
— Special Features for MC68040 Including Burst Mode Support
Four General-Purpose Timers
— Superset of MC68302 Timers
— Four 16-Bit Timers or Two 32-Bit Timers
— Gate Mode Can Enable/Disable Counting
Two Independent DMAs (IDMAs)
— Single Address Mode for Fastest Transfers
— Buffer Chaining and Auto Buffer Modes
— Automatically Performs Efficient Packing
— 32-Bit Internal and External Transfers
System Integration Module (SIM60)
— Bus Monitor
— Double Bus Fault Monitor
— Spurious Interrupt Monitor
— Software Watchdog
— Periodic Interrupt Timer
— Low Power Stop Mode
— Clock Synthesizer
— Breakpoint Logic Provides On-Chip Hardware Breakpoints
— External Masters May Use On-Chip Features Such As Chip Selects
— On-Chip Bus Arbitration with No Overhead for Internal Masters
— IEEE 1149.1 Test Access Port
Interrupts
— Seven External IRQ Lines
— 12 Port Pins with Interrupt Capability
— 16 Internal Interrupt Sources
— Programmable Priority Between SCCs
— Programmable Highest Priority Request
Communications Processor Module (CPM)
— RISC Controller
— Many New Commands (e.g., Graceful Stop Transmit, Close RxBD)
— 224 Buffer Descriptors
— Supports Continuous Mode Transmission and Reception on All Serial Channels
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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