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寤犲晢锛� Freescale Semiconductor
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鎻忚堪锛� IC MPU 32BIT 20MHZ 179-PGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
绯诲垪锛� M680x0
铏曠悊鍣ㄩ鍨嬶細 M680x0 32-浣�
閫熷害锛� 20MHz
闆诲锛� 5V
瀹夎椤炲瀷锛� 閫氬瓟
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鍖呰锛� 鎵樼洡
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MOTOROLA
M68040 USER鈥橲 MANUAL
B-3
MC68EC040 REV2.3 (01/31/2000)
PTEST and PFLUSH instructions cause an indeterminate result (i.e., an undetermined
number of bus cycles); the user should not execute them on the MC68EC040.
The MC68EC040 does not contain an FPU which causes unimplemented floating-point
exceptions to occur using a new stack frame format.
The DLE and MDIS pin names have been changed to JS0 and JS1, respectively.
The MC68EC040 does not implement the DLE mode, multiplexed, or output buffer im-
pedance selection modes of operation. The MC68EC040 implements only the small
output buffer mode of operation. All timing and drive capabilities of the MC68EC040 are
equivalent to those of the MC68040 in the small buffer mode of operation.
B.2 JTAG SCAN (JS1鈥揓S0)
The MC68040 MDIS and DLE pin names have been changed to JS1 and JS0 respectively.
During normal operation, the JS1 and JS0 pin cannot oat, they must be tied to GND or Vcc
directly or through a resistor. During board testing, these pins retain the functionality of the
JTAG scan of the MC68040 for compatibility purposes. Refer to Section 6 IEEE 1149.1A
Figure B-2. MC68EC040 Programming Model
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7/USP
PC
CCR
A7鈥�/ISP
A7鈥�/MSP
SR
VBR
SFC
DFC
CACR
URP
SRP
TC
DTT0
DTT1
ITT0
ITT1
MMUSR
(CCR)
DATA
REGISTERS
ADDRESS
REGISTERS
31
0
31
0
USER STACK POINTER
PROGRAM COUNTER
CONDITIONAL CODE REGISTER
INTERRUPT STACK POINTER
MASTER STACK POINTER
STATUS REGISTER
VECTOR BASE REGISTER
SOURCE FUNCTION CODE
DESTINATION FUNCTION CODE
CACHE CONTROL REGISTER
USER ROOT POINTER REGISTER
SUPERVISOR ROOT POINTER REGISTER
TRANSLATION CONTROL REGISTER
DATA TRANSPARENT TRANSLATION REGISTER 0
DATA TRANSPARENT TRANSLATION REGISTER 1
INSTRUCTION TRANSPARENT TRANSLATION REGISTER 0
INSTRUCTION TRANSPARENT TRANSLATION REGISTER 1
MMU STATUS REGISTER
USER PROGRAMMING MODEL
SUPERVISOR PROGRAMMING MODEL
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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MC68EC040RC20B 鍒堕€犲晢:MOTOROLA 鍒堕€犲晢鍏ㄧū:Motorola, Inc 鍔熻兘鎻忚堪:M68000-compatible, high-performance, 32-bit microprocessors
MC68EC040RC25A 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU 32B W/ CACHE RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324
MC68EC040RC25B 鍒堕€犲晢:MOTOROLA 鍒堕€犲晢鍏ㄧū:Motorola, Inc 鍔熻兘鎻忚堪:M68000-compatible, high-performance, 32-bit microprocessors
MC68EC040RC33A 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU 32B W/ CACHE RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324
MC68EC040RC33B 鍒堕€犲晢:MOTOROLA 鍒堕€犲晢鍏ㄧū:Motorola, Inc 鍔熻兘鎻忚堪:M68000-compatible, high-performance, 32-bit microprocessors