參數(shù)資料
型號： MC68332ACFC25
廠商： Freescale Semiconductor
文件頁數(shù)： 25/88頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 25MHZ 132-PQFP
標準包裝： 36
系列： M683xx
核心處理器： CPU32
芯體尺寸： 32-位
速度： 25MHz
連通性： EBI/EMI，SCI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 15
程序存儲器類型： ROMless
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 132-BQFP 緩沖式
包裝： 托盤
MC68332
MOTOROLA
MC68332TS/D
31
3.5.1 Chip-Select Registers
Pin assignment registers CSPAR0 and CSPAR1 determine functions of chip-select pins. These regis-
ters also determine port size (8- or 16-bit) for dynamic bus allocation.
A pin data register (PORTC) latches discrete output data.
Blocks of addresses are assigned to each chip-select function. Block sizes of 2 Kbytes to 1 Mbyte can
be selected by writing values to the appropriate base address register (CSBAR). Address blocks for
separate chip-select functions can overlap.
Chip-select option registers (CSORBT and CSOR[10:0]) determine timing of and conditions for asser-
tion of chip-select signals. Eight parameters, including operating mode, access size, synchronization,
and wait state insertion can be specified.
Initialization code often resides in a peripheral memory device controlled by the chip-select circuits. A
set of special chip-select functions and registers (CSORBT, CSBARBT) is provided to support bootstrap
operation.
3.5.2 Pin Assignment Registers
The pin assignment registers (CSPAR0 and CSPAR1) contain pairs of bits that determine the function
of chip-select pins. The pin assignment encodings used in these registers are shown below.
CSPAR0 contains seven 2-bit fields that determine the functions of corresponding chip-select pins.
CSPAR0[15:14] are not used. These bits always read zero; writes have no effect. CSPAR0 bit 1 always
reads one; writes to CSPAR0 bit 1 have no effect.
Table 12 Pin Assignment Encodings
Bit Field
Description
00
Discrete Output
01
Alternate Function
10
Chip Select (8-Bit Port)
11
Chip Select (16-Bit Port)
CSPAR0 —Chip Select Pin Assignment Register 0
$YFFA44
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CSPA0[6]
CSPA0[5]
CSPA0[4]
CSPA0[3]
CSPA0[2]
CSPA0[1]
CSBOOT
RESET:
0
DATA2
1
DATA2
1
DATA2
1
DATA1
1
DATA1
1
DATA1
1
DATA0
Table 13 CSPAR0 Pin Assignments
CSPAR0 Field
Chip Select Signal
Alternate Signal
Discrete Output
CSPA0[6]
CS5
FC2
PC2
CSPA0[5]
CS4
FC1
PC1
CSPA0[4]
CS3
FC0
PC0
CSPA0[3]
CS2
BGACK
—
CSPA0[2]
CS1
BG
—
CSPA0[1]
CS0
BR
—
CSBOOT
——
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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