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參數(shù)資料
| 型號(hào)： | MC68331CPV16 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 76/84頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 16MHZ 144-LQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | M683xx |
| 核心處理器： | CPU32 |
| 芯體尺寸： | 32-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲(chǔ)器類型： | ROMless |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
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78
MC68331TS/D
OM/OL[5:2] — Output Compare Mode Bits and Output Compare Level Bits
Each pair of bits specifies an action to be taken when output comparison is successful.
EDGE[4:1] — Input Capture Edge Control Bits
Each pair of bits configures input sensing logic for the corresponding input capture.
TMSK1 enables OC and IC interrupts. TMSK2 controls pulse accumulator interrupts and TCNT func-
tions.
I4/O5I — Input Capture 4/Output Compare 5 Interrupt Enable
0 = IC4/OC5 interrupt disabled
1 = IC4/OC5 interrupt requested when I4/O5F flag in TFLG1 is set
OCI[4:1] — Output Compare Interrupt Enable
0 = OC interrupt disabled
1 = OC interrupt requested when OC flag set
OCI[4:1] correspond to OC[4:1].
ICI[3:1] — Input Capture Interrupt Enable
0 = IC interrupt disabled
1 = IC interrupt requested when IC flag set
ICI[3:1] correspond to IC[3:1].
TOI — Timer Overflow Interrupt Enable
0 = Timer overflow interrupt disabled
1 = Interrupt requested when TOF flag is set
PAOVI — Pulse Accumulator Overflow Interrupt Enable
0 = Pulse accumulator overflow interrupt disabled
1 = Interrupt requested when PAOVF flag is set
PAII — Pulse Accumulator Input Interrupt Enable
0 = Pulse accumulator interrupt disabled
1 = Interrupt requested when PAIF flag is set
CPROUT — Compare/Capture Unit Clock Output Enable
0 = Normal operation for OC1 pin
1 = TCNT clock driven out OC1 pin
OM/OL[5:2]
Action Taken
00
Timer Disconnected from Output Logic
01
Toggle OCx Output Line
10
Clear OCx Output Line to 0
11
Set OCx Output Line to 1
EDGE[4:1]
Configuration
00
Capture Disabled
01
Capture on Rising Edge Only
10
Capture on Falling Edge Only
11
Capture on Any (Rising or Falling) Edge
TMSK1/TMSK2 — Timer Interrupt Mask Registers 1–2
$YFF920
15
14
11
10
8
7
6
5
4
3
2
0
I4/O5I
OCI
ICI
TOI
0
PAOVI
PAII
CPROUT
CPR
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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