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| 型號(hào)： | MC68331CFC16 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 60/84頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 16MHZ 132-PQFP |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | M683xx |
| 核心處理器： | CPU32 |
| 芯體尺寸： | 32-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲(chǔ)器類型： | ROMless |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 包裝： | 托盤 |
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MC68331TS/D
63
Figure 14 QSPI RAM
Once the CPU has set up the queue of QSPI commands and enabled the QSPI, the QSPI can operate
independently of the CPU. The QSPI executes all of the commands in its queue, sets a flag indicating
that it is finished, and then either interrupts the CPU or waits for CPU intervention. It is possible to ex-
ecute a queue of commands repeatedly without CPU intervention.
RR[0:F] — Receive Data RAM
$YFFD00
Data received by the QSPI is stored in this segment. The CPU reads this segment to retrieve data from
the QSPI. Data stored in receive RAM is right-justified. Unused bits in a receive queue entry are set to
zero by the QSPI upon completion of the individual queue entry. The CPU can access the data using
byte, word, or long-word addressing.
The CPTQP value in SPSR shows which queue entries have been executed. The CPU uses this infor-
mation to determine which locations in receive RAM contain valid data before reading them.
TR[0:F] — Transmit Data RAM
$YFFD20
Data that is to be transmitted by the QSPI is stored in this segment. The CPU usually writes one word
of data into this segment for each queue command to be executed.
Information to be transmitted must be written to transmit data RAM in a right-justified format. The QSPI
cannot modify information in the transmit data RAM. The QSPI copies the information to its data serial-
izer for transmission. Information remains in transmit RAM until overwritten.
*The PCS0 bit represents the dual-function PCS0/SS.
Command RAM is used by the QSPI when in master mode. The CPU writes one byte of control infor-
mation to this segment for each QSPI command to be executed. The QSPI cannot modify information
in command RAM.
CR[0:F] — Command RAM
$YFFD40
7
6543210
CONT
BITSE
DT
DSCK
PCS3
PCS2
PCS1
PCS0*
—
CONT
BITSE
DT
DSCK
PCS3
PCS2
PCS1
PCS0*
RECEIVE
RAM
TRANSMIT
RAM
500
51E
520
53E
WORD
540
54F
COMMAND
RAM
BYTE
WORD
RR0
RR1
RR2
RRD
RRE
RRF
TR0
TR1
TR2
TRD
TRE
TRF
CR0
CR1
CR2
CRD
CRE
CRF
F
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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| MC68331CFC16B1 | 功能描述:IC MCU 32BIT 16MHZ 132-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M683xx 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68331CFC20 | 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC20B1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC25 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC25B1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
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