參數(shù)資料
型號: MC56F8356MFVE
廠商: Freescale Semiconductor
文件頁數(shù): 108/178頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 60MHZ 144-LQFP
標準包裝: 60
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,EBI/EMI,SCI,SPI
外圍設備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 264KB(132K x 16)
程序存儲器類型: 閃存
RAM 容量: 10K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 144-LQFP
包裝: 托盤
配用: MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
Signal Pins
56F8356 Technical Data, Rev. 13
Freescale Semiconductor
35
Preliminary
ANB0
104
Input
Analog
Input
ANB0 - 3 — Analog inputs to ADC B, channel 0
ANB1
105
ANB2
106
ANB3
107
ANB4
108
Input
Analog
Input
ANB4 - 7 — Analog inputs to ADC B, channel 1
ANB5
109
ANB6
110
ANB7
111
TEMP_SENSE
96
Output
Analog
Output
Temperature Sense Diode — This signal connects to an on-chip
diode that can be connected to one of the ADC inputs and used to
monitor the temperature of the die. Must be bypassed with a
0.01
μF capacitor.
CAN_RX
127
Schmitt
Input
Input,
pull-up
enabled
FlexCAN Receive Data — This is the CAN input. This pin has an
internal pull-up resistor.
To deactivate the internal pull-up resistor, set the CAN bit in the
SIM_PUDR register.
CAN_TX
126
Open
Drain
Output
Open
Drain
Output
FlexCAN Transmit Data — CAN output with internal pull-up
enable at reset. *
* Note: If a pin is configured as open drain output mode, internal
pull-up will automatically be disabled when it outputs low. Internal
pull-up will be enabled unless it has been manually disabled by
clearing the corresponding bit in the PUREN register of the GPIO
module, when it outputs high.
If a pin is configured as push-pull output mode, internal pull-up will
automatically be disabled, whether it outputs low or high.
TC0
(GPIOE8)
118
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
TC0 — Timer C, Channel 0
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
At reset, this pin defaults to timer functionality.
To deactivate the internal pull-up resistor, clear bit 8 of the
GPIOE_PUR register.
Table 2-2 Signal and Package Information for the 144-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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