參數(shù)資料
型號: MC56F8356MFV60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 106/178頁
文件大小: 910K
代理商: MC56F8356MFV60
Signal Pins
56F8356 Technical Data, Rev. 13
Freescale Semiconductor
33
Preliminary
PWMA0
62
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA0 - 5 — These are six PWMA outputs.
PWMA1
64
PWMA2
65
PWMA3
67
PWMA4
68
PWMA5
70
ISA0
(GPIOC8)
113
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
ISA0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMA.
Port C GPIO — These GPIO pins can be individually programmed
as input or output pins.
In the 56F8356, these pins default to ISA functionality after reset.
In the 56F8156, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOC_PUR register. For details, see Part 6.5.8.
ISA1
(GPIOC9)
114
ISA2
(GPIOC10)
115
FaultA0
71
Schmitt
Input
Input,
pull-up
enabled
FaultA0 - 2 — These three fault input pins are used for disabling
selected PWMA outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMA0 bit in the
SIM_PUDR register. For details, see Part 6.5.8.
FaultA1
73
FaultA2
74
PWMB0
34
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMB0 - 5 — Six PWMB output pins.
PWMB1
35
PWMB2
36
PWMB3
39
PWMB4
40
PWMB5
41
Table 2-2 Signal and Package Information for the 144-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
相關PDF資料
PDF描述
MC56F8156VFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8356MFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8357MPY60 16-BIT, 120 MHz, OTHER DSP, PQFP160
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相關代理商/技術參數(shù)
參數(shù)描述
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