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  • 參數(shù)資料
    型號(hào): MC56F8323VFBE
    廠商: Freescale Semiconductor
    文件頁(yè)數(shù): 10/140頁(yè)
    文件大?。?/td> 0K
    描述: IC MPU HYBRID DSP 32K 64-LQFP
    標(biāo)準(zhǔn)包裝: 160
    系列: 56F8xxx
    核心處理器: 56800E
    芯體尺寸: 16-位
    速度: 60MHz
    連通性: CAN,SCI,SPI
    外圍設(shè)備: POR,PWM,溫度傳感器,WDT
    輸入/輸出數(shù): 27
    程序存儲(chǔ)器容量: 32KB(16K x 16)
    程序存儲(chǔ)器類型: 閃存
    RAM 容量: 12K x 8
    電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 105°C
    封裝/外殼: 64-LQFP
    包裝: 托盤(pán)
    配用: MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
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    General Characteristics
    56F8323 Technical Data, Rev. 17
    Freescale Semiconductor
    107
    Preliminary
    1. Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application. Determined on 2s2p ther-
    mal test board.
    2. Junction-to-ambient thermal resistance, Theta-JA (RθJA ), was simulated to be equivalent to the JEDEC specification JESD51-2
    in a horizontal configuration in natural convection. Theta-JA was also simulated on a thermal test board with two internal planes
    (2s2p, where “s” is the number of signal layers and “p” is the number of planes) per JESD51-6 and JESD51-7. The correct name
    for Theta-JA for forced convection or with the non-single layer boards is Theta-JMA.
    3. Junction-to-case thermal resistance, Theta-JC (RθJC ), was simulated to be equivalent to the measured values using the cold
    plate technique with the cold plate temperature used as the "case" temperature. The basic cold plate measurement technique is
    described by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when
    the package is being used with a heat sink.
    4. Thermal Characterization Parameter, Psi-JT (
    Ψ
    JT ), is the "resistance" from junction to reference point thermocouple on top cen-
    ter of case as defined in JESD51-2.
    Ψ
    JT is a useful value to estimate junction temperature in steady-state customer environ-
    ments.
    5. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
    ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
    6. See Part 12.1 for more details on thermal design considerations.
    7. TJ = Junction temperature
    TA = Ambient temperature
    Table 10-2 56F8323/56F8123 ElectroStatic Discharge (ESD) Protection
    Characteristic
    Min
    Typ
    Max
    Unit
    ESD for Human Body Model (HBM)
    2000
    ——
    V
    ESD for Machine Model (MM)
    200
    ——
    V
    ESD for Change Device Model (CDM)
    500
    ——
    V
    Table 10-3 Thermal Characteristics6
    Characteristic
    Comments
    Symbol
    Value
    Unit
    Notes
    64-pin LQFP
    Junction to ambient
    Natural Convection
    RθJA
    41
    °C/W
    2
    Junction to ambient (@1m/sec)
    RθJMA
    34
    °C/W
    2
    Junction to ambient
    Natural Convection
    Four layer board
    (2s2p)
    RθJMA
    (2s2p)
    34
    °C/W
    1,2
    Junction to ambient (@1m/sec)
    Four layer board
    (2s2p)
    RθJMA
    29
    °C/W
    1,2
    Junction to case
    RθJC
    8°C/W
    3
    Junction to center of case
    Ψ
    JT
    2°C/W
    4, 5
    I/O pin power dissipation
    P I/O
    User-determined
    W
    Power dissipation
    P D
    P D = (IDD x VDD +
    P I/O)
    W
    Maximum allowed PD
    PDMAX
    (TJ - TA) / R
    θJA7
    W
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